Ara es mostren els items 21-40 de 322

    • A Self-Repairable TRNG 

      Martin, Honorio; Di Natale, Giorgio; Peris-Lopez, Pedro (2016-11-14)
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    • A systematic method to design efficient ternary high performance CNTFET-based logic cells 

      Dabaghi Zarandi, Arezoo; Reza Reshadinezhad, Mohammad; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2020-01-01)
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      The huge quantity of nodes and interconnections in modern binary circuits leads to extremely high levels of energy consumption. The interconnection complexity and other issues of binary circuits encourage researchers to ...
    • A versatile CMOS transistor array IC for the statistical characterization of time-zero variability, RTN, BTI, and HCI 

      Diaz Fortuny, Javier; Martin Martínez, Javier; Rodríguez Martínez, Rosana; Castro López, Rafael; Roca Moreno, Elisenda; Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Mateo Peña, Diego; Fernández Fernández, Francisco V.; Nafría Maqueda, Montserrat (2018-01-01)
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      Statistical characterization of CMOS transistor variability phenomena in modern nanometer technologies is key for accurate end-of-life prediction. This paper presents a novel CMOS transistor array chip to statistically ...
    • Active damping based on Ackermann's formula for a three-phase voltage source inverter with LCL filter 

      Guzmán Solà, Ramon; García de Vicuña Muñoz de la Nava, José Luis; Morales López, Javier; Momeneh, Arash; Miret Tomàs, Jaume; Torres Martínez, Javier (2015)
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      This paper presents an active damping method in natural frame for a three-phase voltage source inverter with LCL filter. The proposed method is based on the pole placement technique via Ackermann's formula. This approach ...
    • Active radiation-hardening strategy in bulk FinFETs 

      Calomarde Palomino, Antonio; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja; Gamiz, Francisco (Institute of Electrical and Electronics Engineers (IEEE), 2020)
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      In this paper, we present a new method to mitigate the effect of the charge collected by trigate FinFET devices after an ionizing particle impact. The method is based on the creation of an internal structure that generates ...
    • Advanced failure detection techniques in deep submicron CMOS integrated circuits 

      Rubio Sola, Jose Antonio; Altet Sanahujes, Josep; Mateo Peña, Diego (Pergamon Press, 2009)
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      The test of present integrated circuits exhibits many confining aspects, among them the adequate selection of the observable variables, the use of combined testing approaches, an each time more restricted controllability ...
    • Aging compensation in a class-A high-frequency amplifier with DC temperature measurements 

      Altet Sanahujes, Josep; Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Gisbert Beguer, Xavier; Martínez Domingo, Sergio; Mateo Peña, Diego (Multidisciplinary Digital Publishing Institute (MDPI), 2023-08-10)
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      One of the threats to nanometric CMOS analog circuit reliability is circuit performance degradation due to transistor aging. To extend circuit operating life, the bias of the main devices within the circuit must be adjusted ...
    • An academic RISC-V silicon implementation based on open-source components 

      Abella Ferrer, Jaume; Bulla, Calvin; Cabo Pitarch, Guillem; Cazorla Almeida, Francisco Javier; Cristal Kestelman, Adrián; Doblas Font, Max; Figueras Bagué, Roger; González Trejo, Alberto; Hernández Luz, Carles; Hernández Calderón, César Alejandro; Jiménez Arador, Víctor; Kosmidis, Leonidas; Kostalampros, Ioannis-Vatistas; Langarita Benítez, Rubén; Leyva Santes, Neiel; López Paradís, Guillem; Marimon Illana, Joan; Martínez Martínez, Ricardo; Mendoza Escobar, Jonnatan; Moll Echeto, Francisco de Borja; Moretó Planas, Miquel; Pavón Rivera, Julián; Ramírez Lazo, Cristóbal; Ramírez Salinas, Marco Antonio; Rojas Morales, Carlos; Rubio Sola, Jose Antonio; Ruiz, Abraham Josafat; Sonmez, Nehir; Soria Pardos, Víctor; Teres Teres, Lluis; Unsal, Osman Sabri; Valero Cortés, Mateo; Vargas Valdivieso, Iván; Villa Vargas, Luis Alfonso (Institute of Electrical and Electronics Engineers (IEEE), 2020)
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      The design presented in this paper, called preDRAC, is a RISC-V general purpose processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The preDRAC processor is the first RISC-V ...
    • An alternative approach to model the internal activity of integrated circuits. 

      Berbel Artal, Néstor; Fernández García, Raúl; Gil Galí, Ignacio; Li, Binhong; BenDhia, S.; Boyer, A. (2012)
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      This paper deals with the EMC modeling of integrated circuits and the standardized model IEC 62433-2 (Integrated Circuit Emission Model – Conducted Emission [1]). This standardized model has been applied into a basic digital ...
    • An architecture for real-time arbitrary and variable sampling rate conversion with application to the processing of harmonic signals 

      Galindo Guarch, Francisco Javier; Baudrenghien, Philippe; Moreno Aróstegui, Juan Manuel (2020-05)
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      The paper presents a new solution for sampling rate conversion and processing of harmonic signals with known but possibly varying fundamental frequency. This problem is commonly found in particle accelerators, for tracking ...
    • An on-line test strategy and analysis for a 1T1R crossbar memory 

      Escudero, Manel; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Vourkas, Ioannis (Institute of Electrical and Electronics Engineers (IEEE), 2017)
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      Memristors are emerging devices known by their nonvolability, compatibility with CMOS processes and high density in circuits density in circuits mostly owing to the crossbar nanoarchitecture. One of their most notable ...
    • An ultra low-voltage RF front-end receiver for IoT devices 

      Malena, Francesco; Aragonès Cervera, Xavier; Mateo Peña, Diego; Caselli, Michele; Boni, Andrea (Institute of Electrical and Electronics Engineers (IEEE), 2022)
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      This paper presents the design of an RF receiver front-end for IoT application, integrating a low noise amplifier (LNA) and an active mixer. The circuit is designed in 28-nm FDSOI technology, to operate on the ISM 2.4-2.5 ...
    • Analysis and evaluation of using a tuning inductance on the performance of gilbert cell-based CMOS sub-harmonic mixer 

      Saberkari, Alireza; Shokouhi, Shahriar B.; Alarcón Cot, Eduardo José; Baghersalimi, Gholamreza (2012)
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      The effect of using a tuning inductance on the performance of a Gilbert cell-based two level transistor CMOS sub-harmonic mixer is investigated. The tuning inductor used between the RF and LO switching stages causes ...
    • Analysis and modelling of parasitic substrate coupling in CMOS circuits 

      Aragonès Cervera, Xavier; Moll Echeto, Francisco de Borja; Roca Adrover, Miquel; Rubio Sola, Jose Antonio (1995-10)
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      Analysis of the substrate coupling in integrated circuits is done taking into account technology and layout parameters for different types and location of transistors using a device-level simulator. The noise coupling ...
    • Analysis of ISSQ/IDDQ testing implementation and circuit partitioning in CMOS cell-based design 

      Rullán Ayza, Mercedes; Ferrer Ramis, Carles; Oliver, Joan; Mateo Peña, Diego; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 1996)
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      Difference between ISSQ and IDDQ testing strategies is presented, discussing the dependency of area overhead and sensing speed on the technology. The current sensor implementation style suitable for cell-based design ...
    • Analysis of SoftError Rates for future technologies 

      Riera Villanueva, Marc (Universitat Politècnica de Catalunya, 2015-07)
      Projecte Final de Màster Oficial
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      La fiabilitat s'ha convertit en un aspecte important del disseny de sistemes informàtics a causa de la miniaturització de la tecnologia. En aquest projecte s'analitza la fiabilitat de les tecnologies actuals i futures ...
    • Analysis of the contribution of a battery bank to voltage regulation in a distribution system 

      Barbalho, Pedro Inácio de Nascimento e; Albernaz Lacerda Freitas, Vinícius; Coury, Denis V. (Institute of Electrical and Electronics Engineers (IEEE), 2018)
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      Due to demand of higher power quality, reliability and efficiency levels, the penetration of distributed energy resources increased through the past years. Thus, several studies on the different types of electrical energy ...
    • Analyzing stability concerns in the presence of variations in Subthreshold SRAM 

      Rana, Manish (Universitat Politècnica de Catalunya, 2012-07-02)
      Projecte Final de Màster Oficial
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      In this work, we analyse the stability of the SRAM bitcells when operating in subthreshold supply voltages.We propose a new bit cell with higher stability than 6T Bitcell,that is able to discharge the bit lines in 41% less ...
    • Asynchronous pulse logic cell for threshold logic and Boolean networks 

      Lambie, J; Moll Echeto, Francisco de Borja; González Jiménez, José Luis; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2005)
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      In this article, a fully digital CMOS circuit for asynchronous pulse cells is presented. The proposed circuit has a high noise tolerance and no static power consumption. Furthermore it has a high functional programmability. ...
    • Authentication of IC based on Electromagnetic Signature 

      Ahmed, Mosabbah Mushir; Hely, David; Siragusa, Romain; Barbot, Nicolas; Perret, Etienne (2016-11-14)
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      IC Counterfeiting is becoming serious issue. The approach discussed here is to use Electromagnetic (EM) input to an IC and measure its EM input output response. The idea is to extract a signature from EM response which ...