Ara es mostren els items 21-40 de 97

    • Code layout optimizations for transaction processing workloads 

      Ramírez Bellido, Alejandro; Barroso, Luiz A; Gharachorloo, Kourosh; Cohn, Robert; Larriba Pey, Josep; Lowney, P. Geoffrey; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2001)
      Text en actes de congrés
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      Commercial applications such as databases and Web servers constitute the most important market segment for high-performance servers. Among these applications, on-line transaction processing (OLTP) workloads provide a ...
    • Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures 

      Álvarez Martí, Lluc; Vilanova, Lluís; Moretó Planas, Miquel; Casas, Marc; González Tallada, Marc; Martorell Bofill, Xavier; Navarro, Nacho; Ayguadé Parra, Eduard; Valero Cortés, Mateo (Association for Computing Machinery (ACM), 2015)
      Text en actes de congrés
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      The increasing number of cores in manycore architectures causes important power and scalability problems in the memory subsystem. One solution is to introduce scratchpad memories alongside the cache hierarchy, forming a ...
    • Compilación C a VHDL de códigos de bucles con reuso de datos 

      Sánchez Fernández, Raúl (Universitat Politècnica de Catalunya, 2010-03-25)
      Projecte/Treball Final de Carrera
      Accés obert
      Durante este proyecto se ha desarrollado un compilador fuente a fuente, de nombre CtoVHDL, capaz de traducir bucles de C a VHDL. Con esta traducción se crea un acelerador hardware capaz de ejecutar el bucle en una FPGA. ...
    • Compiler Analysis and its application to OmpSs 

      Royuela Alcázar, Sara (Universitat Politècnica de Catalunya, 2012-01-10)
      Projecte Final de Màster Oficial
      Accés obert
      Nowadays, productivity is the buzzword in any computer science area. Several metrics have been defined in order to measure the productivity in any type of system. Some of the most important are the performance, the ...
    • Compiler analysis for trace-level speculative multithreaded architectures 

      Molina Clemente, Carlos; González Colás, Antonio María; Tubella Murgadas, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 2005)
      Text en actes de congrés
      Accés obert
      Trace-level speculative multithreaded processors exploit trace-level speculation by means of two threads working cooperatively. One thread, called the speculative thread, executes instructions ahead of the other by speculating ...
    • Compiler directed early register release 

      Jones, Timothy M.; O’Boyle, Michael F.P.; Abella Ferrer, Jaume; González Colás, Antonio María; Ergin, Oguz (Institute of Electrical and Electronics Engineers (IEEE), 2005)
      Text en actes de congrés
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      This paper presents a novel compiler directed technique to reduce the register pressure and power of the register file by releasing registers early. The compiler identifies registers that mil only be read once and renames ...
    • Compiler support for an AI-oriented SIMD extension of a space processor 

      Solé i Bonet, Marc; Kosmidis, Leonidas (Association for Computing Machinery (ACM), 2022-06)
      Article
      Accés obert
      In this on going research paper, we present our work on the compiler support for an AI-oriented SIMD Extension, called SPARROW. The SPARROW hardware design has been developed during a recently defended, awardwinning Master ...
    • Complex pipelined executions in OpenMP parallel applications 

      González Tallada, Marc; Ayguadé Parra, Eduard; Martorell Bofill, Xavier; Labarta Mancho, Jesús José (Institute of Electrical and Electronics Engineers (IEEE), 2001)
      Text en actes de congrés
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      This paper proposes a set of extensions to the OpenMP programming model to express complex pipelined computations. This is accomplished by defining, in the form of directives, precedence relations among the tasks originated ...
    • Construcció d'un compilador amb parsing LL (*) i templates 

      González López, Alicia (Universitat Politècnica de Catalunya, 2011-06-23)
      Projecte/Treball Final de Carrera
      Accés obert
      Català: En aquest projecte s'ha desenvolupat un compilador pel llenguatge CL fent servir ANTLR v3 i els nous mecanismes que proporciona.
    • Cost-effective compiler directed memory prefetching and bypassing 

      Ortega Fernández, Daniel; Ayguadé Parra, Eduard; Baer, Jean-Loup; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2002)
      Text en actes de congrés
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      Ever increasing memory latencies and deeper pipelines push memory farther from the processor. Prefetching techniques aim is to bridge these two gaps by fetching data in advance to both the L1 cache and the register file. ...
    • DEEPCODE phase 1: Defining optimised compiled language for Code-set Summarization 

      Puig i Mena, Miquel (Universitat Politècnica de Catalunya, 2020-01)
      Treball Final de Grau
      Accés obert
      Realitzat a/amb:   Lunds universitet
      Aún viviendo en la era de la globalización, podemos percibir cierto aislamiento y rivalidad entre equipos de desarrollo de software que comparten objetivos. Para un estudio genérico, un común denominador puede ser detectado: ...
    • Desarrollo de un compilador de Fortran para CellSs/SMPSs 

      Martinell Andreu, Luis (Universitat Politècnica de Catalunya, 2008-06-12)
      Projecte/Treball Final de Carrera
      Accés obert
    • Design under test interface implementation and stimulus in the verification of a RISC-V vector accelerator 

      Jiménez Arador, Víctor (Universitat Politècnica de Catalunya, 2021)
      Projecte Final de Màster Oficial
      Accés restringit per decisió de l'autor
      Realitzat a/amb:   Barcelona Supercomputing Center
      The production of a microprocessor is one of the most complex and expensive processes in the industry these days. These high costs are why big companies dedicate most of their efforts to design verification during the ...
    • Development of a tensor algebra DSL for HPC platforms 

      Vilaseca Darne, Roger (Universitat Politècnica de Catalunya, 2020-10-26)
      Treball Final de Grau
      Accés obert
      En els darrers anys s'ha creat un nou model per generar llenguatges de domini específic anomenat Multi-Level IR, aquest model permet optimitzar les diferents representacions del codi. Per tal de provar aquest nou model, ...
    • Disseny i desenvolupament d'un compilador i la seva interfície per a entorns HPC en modelització basada en agents (ABM) 

      López Reynau, Xavier (Universitat Politècnica de Catalunya, 2019-06-27)
      Treball Final de Grau
      Accés obert
      Al món de les ciències socials, cada vegada més, se sent la necessitat de portar a terme grans simulacions de diferents fenòmens socials per trobar solucions a diferents problemes, com poden ser moviments migratoris, ...
    • Enlarging instruction streams 

      Santana Jaria, Oliverio J.; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (2007-10)
      Article
      Accés obert
      The stream fetch engine is a high-performance fetch architecture based on the concept of an instruction stream. We call a sequence of instructions from the target of a taken branch to the next taken branch, potentially ...
    • Estudi de rendiment de diversos processadors i compiladors 

      Re Delgado, Dario (Universitat Politècnica de Catalunya, 2015-07-02)
      Treball Final de Grau
      Accés restringit per acord de confidencialitat
    • Evaluation of the ALIZE / LIA_RAL Speaker Verification Toolkit on an Embedded System 

      Hernández López, Aitor (Universitat Politècnica de Catalunya, 2015-02)
      Projecte/Treball Final de Carrera
      Accés obert
      Text-independent speaker verification is the computing task of verifying a user's claimed identity using only characteristics extracted from their voices, regardless of the spoken text. Nowadays, a lot of speaker verification ...
    • Extending the OpenCHK Model with advanced checkpoint features 

      Maroñas Bravo, Marcos; Mateo Bellido, Sergi; Keller, Kai Rasmus; Bautista Gomez, Leonardo; Ayguadé Parra, Eduard; Beltran Querol, Vicenç (Elsevier, 2020-11)
      Article
      Accés obert
      One of the major challenges in using extreme scale systems efficiently is to mitigate the impact of faults. Application-level checkpoint/restart (CR) methods provide the best trade-off between productivity, robustness, and ...
    • Flexible compiler-managed L0 buffers for clustered VLIW processors 

      Gibert Codina, Enric; Sánchez Navarro, F. Jesús; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2003)
      Text en actes de congrés
      Accés obert
      Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as clusters. A cluster usually consists of a ...