Now showing items 21-40 of 79

  • Dynamic transaction coalescing 

    Stipic, Srdjan; Karakostas, Vasileios; Smiljkovic, Vesna; Gajinov, Vladimir; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (Association for Computing Machinery (ACM), 2014)
    Conference report
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    Prior work in Software Transactional Memory has identified high overheads related to starting and committing transactions that may degrade the application performance. To amortize these overheads, transaction coalescing ...
  • Dynamic-vector execution on a general purpose EDGE chip multiprocessor 

    Duric, Milovan; Palomar Pérez, Óscar; Smith, Aaron; Stanic, Milan; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo; Burger, Doug; Veidenbaum, Alexander V (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Conference report
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    This paper proposes a cost-effective technique that morphs the available cores of a low power chip multiprocessor (CMP) into an accelerator for data parallel (DLP) workloads. Instead of adding a special-purpose vector ...
  • EcoTM: Conflict-aware economical unbounded hardware transactional memory 

    Tomić, Saša; Akpinar, Ege; Cristal Kestelman, Adrián; Unsal, Osman Sabri; Valero Cortés, Mateo (Elsevier, 2013)
    Conference report
    Open Access
    Transactional Memory (TM) is a promising paradigm for parallel programming. TM allows a thread to make a series of memory accesses as a single, atomic, transaction, while avoiding deadlocks, livelocks, and other problems ...
  • Empowering a helper cluster through data-width aware instruction selection policies 

    Unsal, Osman Sabri; Ergin, Oguz; Vera Rivera, Francisco Javier; González Colás, Antonio María (IEEE Computer Society, 2006)
    Conference report
    Open Access
    Narrow values that can be represented by less number of bits than the full machine width occur very frequently in programs. On the other hand, clustering mechanisms enable cost- and performance-effective scaling of processor ...
  • Evaluation of vectorization potential of Graph500 on Intel's Xeon Phi 

    Stanic, Milan; Palomar Pérez, Óscar; Ratkovic, Ivan; Duric, Milovan; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Conference report
    Open Access
    Graph500 is a data intensive application for high performance computing and it is an increasingly important workload because graphs are a core part of most analytic applications. So far there is no work that examines if ...
  • EVX: vector execution on low power EDGE cores 

    Duric, Milovan; Palomar Pérez, Óscar; Smith, Aaron; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo; Burger, Doug (European Interactive Digital Advertising Alliance (EDAA), 2014)
    Conference report
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    In this paper, we present a vector execution model that provides the advantages of vector processors on low power, general purpose cores, with limited additional hardware. While accelerating data-level parallel (DLP) ...
  • Experimental study of aggressive undervolting in FPGAs 

    Salami, Behzad; Unsal, Osman Sabri; Cristal Kestelman, Adrián (Barcelona Supercomputing Center, 2019-05-07)
    Conference report
    Open Access
    In this work, we evaluate aggressive undervolting, i.e., voltage scaling below the nominal level to reduce the energy consumption of Field Programmable Gate Arrays (FPGAs). Usually, voltage guardbands are added by chip ...
  • Exploiting narrow values for soft error tolerance 

    Ergin, Oguz; Unsal, Osman Sabri; Vera Rivera, Francisco Javier; González Colás, Antonio María (2006-07)
    Article
    Open Access
    Soft errors are an important challenge in contemporary microprocessors. Particle hits on the components of a processor are expected to create an increasing number of transient errors with each new microprocessor generation. ...
  • Exploring the capabilities of support vector machines in detecting silent data corruptions 

    Subasi, Omer; Di, Sheng; Bautista-Gomez, Leonardo; Balaprakash, Prasanna; Unsal, Osman Sabri; Labarta Mancho, Jesús José; Cristal Kestelman, Adrián; Krishnamoorthy, Sriram; Cappello, Franck (Elsevier, 2018-09)
    Article
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    As the exascale era approaches, the increasing capacity of high-performance computing (HPC) systems with targeted power and energy budget goals introduces significant challenges in reliability. Silent data corruptions ...
  • FaulTM: Error detection and recovery using hardware transactional memory 

    Yalcin, Gulay; Unsal, Osman Sabri; Cristal Kestelman, Adrián (2013)
    Conference report
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    Reliability is an essential concern for processor designers due to increasing transient and permanent fault rates. Executing instruction streams redundantly in chip multi processors (CMP) provides high reliability since ...
  • FaulTM: Fault-tolerance using hardware transactional memory 

    Yalcin, Gulay; Unsal, Osman Sabri; Hur, Ibrahim; Cristal Kestelman, Adrián; Valero Cortés, Mateo (2010)
    Conference report
    Open Access
    Fault-tolerance has become an essential concern for processor designers due to increasing soft-error rates. In this study, we are motivated by the fact that Transactional Memory (TM) hardware provides an ideal base upon ...
  • FIMSIM: A fault injection infrastructure for microarchitectural simulators 

    Yalcin, Gulay; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (2011)
    External research report
    Open Access
    Fault injection is a widely used approach for experiment-based dependability evaluation in which faults can be injected to the hardware, to the simulator or to the software. Simulation based fault injection is more appealing ...
  • From plasma to beefarm: Design experience of an FPGA-based multicore prototype 

    Sonmez, Nehir; Arcas Abella, Oriol; Sayilar, Gokhan; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Hur, Ibrahim; Singh, Satnam; Valero Cortés, Mateo (Springer, 2011)
    Conference report
    Open Access
    In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obtain the Beefarm infrastructure for FPGA-based multiprocessor emulation, a popular research topic of the last few years ...
  • Fuse: A technique to anticipate failures due to degradation in ALUs 

    Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; Unsal, Osman Sabri; Ergin, Oguz; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2007)
    Conference report
    Open Access
    This paper proposes the fuse, a technique to anticipate failures due to degradation in any ALU (arithmetic logic unit), and particularly in an adder. The fuse consists of a replica of the weakest transistor in the adder ...
  • Future vector microprocessor extensions for data aggregations 

    Hayes, Timothy; Palomar, Oscar; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Conference lecture
    Open Access
    As the rate of annual data generation grows exponentially, there is a demand to aggregate and summarise vast amounts of information quickly. In the past, frequency scaling was relied upon to push application throughput. ...
  • Hardware scheduling algorithms for asymmetric single-ISA CMPs 

    Markovic, Nikola; Nemirovsky, Daniel; Unsal, Osman Sabri; Valero Cortés, Mateo; Cristal Kestelman, Adrián (Barcelona Supercomputing Center, 2015-05-05)
    Conference report
    Open Access
    As thread level parallelism in applications has continued to expand, so has research in chip multi-core processors. Since more and more applications become multi-threaded we expect to find a growing number of threads ...
  • Hardware transactional memory with software-defined conflicts 

    Titos Gil, Rubén; Acacio, Manuel E.; García, José M.; Harris, Tim; Cristal Kestelman, Adrián; Unsal, Osman Sabri; Hur, Ibrahim; Valero Cortés, Mateo (2010)
    Conference report
    Open Access
    In this paper we propose conflict-defined blocks, a programming language construct that allows programmers to change the concept of conflict from one transaction to another, or even throughout the course of the same ...
  • Hybrid transactional memory to accelerate safe lock-based transactions 

    Vallejo, Enrique; Harris, Tim; Cristal Kestelman, Adrián; Unsal, Osman Sabri; Valero Cortés, Mateo (Association for Computing Machinery (ACM), 2008)
    Conference report
    Open Access
    To reduce the overhead of Software Transactional Memory (STM) there are many recent proposals to build hybrid systems that use architectural support either to accelerate parts of a particular STM algorithm (Ha-TM), or ...
  • Hybrid transactional memory with pessimistic concurrency control 

    Vallejo, Enrique; Sanyal, Sutirtha; Harris, Tim; Vallejo, Fernando; Beivide, Ramón; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Valero Cortés, Mateo (2011-06)
    Article
    Restricted access - publisher's policy
    Transactional Memory (TM) intends to simplify the design and implementation of the shared-memory data structures used in parallel software. Many Software TM systems are based on writer-locks to protect the data being ...
  • Impact of parameter variations on circuits and microarchitecture 

    Unsal, Osman Sabri; Tschanz, James W.; Bowman, Keith; De, Vivek; Vera Rivera, Francisco Javier; González Colás, Antonio María; Ergin, Oguz (2006-12)
    Article
    Open Access
    Parameter variations, which are increasing along with advances in process technologies, affect both timing and power. Variability must be considered at both the circuit and microarchitectural design levels to keep pace ...