Exploració per autor "Álvarez Martínez, Carlos"
Ara es mostren els items 21-40 de 48
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Fuzzy memoization for floating-point multimedia applications
(2005-07)
Article
Accés obertInstruction memoization is a promising technique to reduce the power consumption and increase the performance of future low-end/mobile multimedia systems. Power and performance efficiency can be improved by reusing instances ... -
Heterogeneous tasking on SMP/FPGA SoCs: The case of OmpSs and the Zynq
(Institute of Electrical and Electronics Engineers (IEEE), 2013)
Text en actes de congrés
Accés restringit per política de l'editorialOmpSs is a directive-based programming model that uses OpenMP-like directives, that allow to execute the tasks annotated on both the SMPs and as FPGA kernels on modern SoC processors, like the Xilinx Zynq platform. OmpSs ... -
High performance computing PP-distance algorithms to generate X-ray spectra from 3D models
(Multidisciplinary Digital Publishing Institute (MDPI), 2022-09-27)
Article
Accés obertX-ray crystallography is a powerful method that has significantly contributed to our understanding of the biological function of proteins and other molecules. This method relies on the production of crystals that, however, ... -
El Impacto de eliminar el examen final
(Universidad de Almería, 2016-07-06)
Comunicació de congrés
Accés obertDesde hace algún tiempo se publican en JENUI artículos donde se argumenta sobre la conveniencia de eliminar el examen final como forma de fomentar el trabajo del estudiante durante todo el curso. Convencidos de lo apropiado ... -
Improving performance of HPC kernels on FPGAs using high-level resource management
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Comunicació de congrés
Accés obertIn state-of-the-art FPGA, especially in chiplet-based devices, place and route has become an important challenge due to an increase in device size and complexity. In the same way, off-chip memory resources have grown in ... -
Initial results on fuzzy floating point computation for multimedia processors
(2002-01)
Article
Accés obertDuring the recent years, the market of mid/low-end portable systems such as PDAs or mobile digital phones have experimented a revolution in both selling volume and features as handheld devices incorporate Multimedia ... -
LEGaTO: Low-energy, secure, and resilient toolset for heterogeneous computing
(Institute of Electrical and Electronics Engineers (IEEE), 2020)
Text en actes de congrés
Accés obertThe LEGaTO project leverages task-based programming models to provide a software ecosystem for Made in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. The aim is to attain one order of ... -
Mamá, de mayor quiero ser ingeniero/a en informática
(Universidade de Santiago de Compostela. Escola Técnica Superior d'Enxeñaría, 2010-07-07)
Comunicació de congrés
Accés obertEl número de estudiantes que se matriculan en Ingeniería Informática no ha dejado de disminuir en los últimos años. Sin embargo, la demanda de profesionales no deja de crecer. Los autores de este trabajo pensamos que el ... -
Metodología para la generación y evaluación automática de hardware específico
(2009-09)
Text en actes de congrés
Accés obertEn el área de la bioinformática podemos encontrar aplicaciones que suponen un reto para el diseño de nuevas arquitecturas de procesadores en términos de rendimiento, ya que sus características difieren de las de las ... -
MInGLE: An efficient framework for domain acceleration using low-power specialized functional units
(2016-06)
Article
Accés obertThe end of Dennard scaling leads to new research directions that try to cope with the utilization wall in modern chips, such as the design of specialized architectures. Processor customization utilizes transistors more ... -
OmpSs@cloudFPGA: An FPGA task-based programming model with message passing
(Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés obertNowadays, a new parallel paradigm for energy-efficient heterogeneous hardware infrastructures is required to achieve better performance at a reasonable cost on high-performance computing applications. Under this new paradigm, ... -
OmpSs@FPGA framework for high performance FPGA computing
(Institute of Electrical and Electronics Engineers (IEEE), 2021-12-01)
Article
Accés obertThis paper presents the new features of the OmpSs@FPGA framework. OmpSs is a data-flow programming model that supports task nesting and dependencies to target asynchronous parallelism and heterogeneity. OmpSs@FPGA is the ... -
OmpSs@Zynq All-Programmable SoC Ecosystem
(Association for Computing Machinery (ACM), 2014)
Text en actes de congrés
Accés restringit per política de l'editorialOmpSs is an OpenMP-like directive-based programming model that includes heterogeneous execution (MIC, GPU, SMP, etc.) and runtime task dependencies management. Indeed, OmpSs has largely influenced the recently appeared ... -
Performance analysis of a hardware accelerator of dependence management for taskbased dataflow programming models
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés obertAlong with the popularity of multicore and manycore, task-based dataflow programming models obtain great attention for being able to extract high parallelism from applications without exposing the complexity to programmers. ... -
Picos: A hardware runtime architecture support for OmpSs
(Elsevier, 2015-12)
Article
Accés obertOmpSs is a programming model that provides a simple and powerful way of annotating sequential programs to exploit heterogeneity and task parallelism based on runtime data dependency analysis, dataflow scheduling and ... -
¿Por qué faltan a clase los alumnos?
(Asociación de Enseñantes Universitarios de la Informática (AENUI), 2017)
Text en actes de congrés
Accés obertComo profesores, con frecuencia hemos observado que no todos los estudiantes asisten regularmente a clase y que, en momentos puntuales del curso, una cantidad significativa de ellos desaparece de las aulas. La mayoría de ... -
Preliminary work on a mechanism for testing a customized architecture
(2009-07)
Text en actes de congrés
Accés obertHardware customization for scientific applications has shown a big potential for reducing power consumption and increasing performance. In particular, the automatic generation of ISA extensions for General-Purpose Processors ... -
Simulating next-generation Cyber-physical computing platforms
(2015)
Text en actes de congrés
Accés restringit per política de l'editorialIn specific domains, such as cyber-physical systems, platforms are quickly evolving to include multiple (many-) cores and programmable logic in a single system-on-chip, while includ- ing interfaces to commodity ... -
Supporting task creation inside FPGA devices
(Barcelona Supercomputing Center, 2019-05-07)
Text en actes de congrés
Accés obertThe most common model to use co-processors/accelerators is the master-slave model where the slaves (coprocessors/ accelerators) are driven by a general purpose cpu. This simplifies the management of the accelerators because ... -
Task dependences management hardware acceleration for task-based dataflow programming models
(Barcelona Supercomputing Center, 2015-05-05)
Text en actes de congrés
Accés obertTask-based programming models have gained a lot of attention for being able to explore high parallelism over multicore and manycore, while hiding the difficulties of parallel programming. For applications with moderate ...
