Browsing by Author "Figueras Pàmies, Joan"
Now showing items 21-40 of 51
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Indirect test of M-S circuits using multiple specification band guarding
(2016-09-01)
Article
Open AccessTesting analog and mixed-signal circuits is a costly task due to the required test time targets and high end technical resources. Indirect testing methods partially address these issues providing an efficient solution using ... -
La concurrencia de sistemas basados en microcomputador
(Asociación de Técnicos de Informática, 1978-01)
Article
Open Access -
La Promoció 108 compleix 50 anys (1964-2014): història, entorn i records
(Brau, 2014-09-01)
Book
Open Access -
Localization and electrical characterization of interconnect open defects
(2010-02)
Article
Open AccessA technique for extracting the electrical and topological parameters of open defects in process monitor lines is presented. The procedure is based on frequency-domain measurements performed at both end points of the ... -
M-S test based on specification validation using octrees in the measure space
(2013)
Conference report
Restricted access - publisher's policyTesting M-S circuits is a difficult task demanding high amount of resources. To overcome these drawbacks, indirect testing methods have been adopted as an efficient solution to perform specification based tests using easy ... -
Mixed-signal test band guarding using digitally coded indirect measurements
(Institute of Electrical and Electronics Engineers (IEEE), 2015)
Conference report
Restricted access - publisher's policyTesting analog and mixed-signal circuits is a costly task due to the required test time targets and high end technical resources. Indirect testing methods partially address these issues providing an efficient solution using ... -
Multi-directional space tessellation to improve the decision boundary in indirect mixed-signal testing
(2017-02-20)
Article
Restricted access - publisher's policyOne of the most challenging aspects in nowadays microelectronics industry is production test and verification of mixed-signal circuits. In order to cope with some of the drawbacks encountered in this scenario, researchers ... -
Nondestructive diagnosis of mechanical misalignments in dual axis accelerometers
(2013)
Conference report
Restricted access - publisher's policyMicroelectromechanical systems production is still an immature technology compared to the classical semiconductor industry. MEMS fabrication and packaging processes may present misalignments which result in an improper ... -
Parametric Failure Analysis of Embedded SRAMs using Fast & Accurate Dynamic Analysis
(IEEE Press. Institute of Electrical and Electronics Engineers, 2010)
Conference report
Restricted access - publisher's policy -
Post-Bond test of through-silicon vias with open defects
(2014)
Conference report
Restricted access - publisher's policyThrough Silicon Vias (TSVs) are critical elements in three dimensional integrated circuits (3-D ICs) and are susceptible to undergo defects at different stages: during their own fabrication, the bonding stage or during ... -
Postbond test of through-silicon vias with resistive open defects
(2019-07-17)
Article
Open AccessThrough-silicon vias (TSVs) technology has attracted industry interest as a way to achieve high bandwidth, and short interconnect delays in nanometer three-dimensional integrated circuits (3-D ICs). However, TSVs are ... -
Power-aware voltage tuning for STT-MRAM reliability
(Institute of Electrical and Electronics Engineers (IEEE), 2015)
Conference report
Restricted access - publisher's policyOne of the most promising emerging memory technologies is the Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM), due to its high speed, high endurance, low area, low power consumption, and good scaling capability. ... -
Prebond testing of weak defects in TSVs
(2015-08-07)
Article
Restricted access - publisher's policyThrough-silicon vias (TSVs) are critical elements in 3-D integrated circuits susceptible to defects during fabrication and lifetime. It is desirable to detect defective TSVs in the early steps of the fabrication process ... -
Process variability in sub-16nm bulk CMOS technology
(2012-03-01)
Research report
Open AccessThe document is part of deliverable D3.6 of the TRAMS Project (EU FP7 248789), of public nature, and shows and justifies the levels of variability used in the research project for sub-18nm bulk CMOS technologies. -
Quality metrics for mixed-signal indirect testing
(2014)
Conference report
Open Access -
Quiescent current analysis and experimentation of defective CMOS circuits
(1992-12)
Article
Restricted access - publisher's policyPhysical defects widely encountered in today's CMOS processes (bridges, gate oxide short (gas) and floating gates) are modeled taking into account the topology of the defective circuit and the parameters of the technology. ... -
Read/write robustness estimation metrics for spin transfer torque (STT) MRAM cell
(Institute of Electrical and Electronics Engineers (IEEE), 2015)
Conference report
Restricted access - publisher's policyThe rapid development of low power, high density, high performance SoCs has pushed the embedded memories to their limits and opened the field to the development of emerging memory technologies. The Spin- Transfer-Torque ... -
Redes de ordenadores, redes de sistemas, sistemas distribuidos
(Asociación de Técnicos de Informática, 1980-11)
Article
Open Access -
Reliability estimation at block-level granularity of spin-transfer-torque MRAMs
(Institute of Electrical and Electronics Engineers (IEEE), 2014)
Conference report
Restricted access - publisher's policyIn recent years, the Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM) has emerged as a promising choice for embedded memories due to its reduced read/write latency and high CMOS integration capability. Under ... -
Robustness of SRAM to Power Supply Noise during Leakage Power Saving in DVS
(IEEE Press. Institute of Electrical and Electronics Engineers, 2010)
Conference report
Restricted access - publisher's policy
