Exploració per autor "Jiménez González, Daniel"
Ara es mostren els items 21-40 de 47
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Improving performance of HPC kernels on FPGAs using high-level resource management
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Comunicació de congrés
Accés obertIn state-of-the-art FPGA, especially in chiplet-based devices, place and route has become an important challenge due to an increase in device size and complexity. In the same way, off-chip memory resources have grown in ... -
Improving resource usage in large FPGA accelerators
(Barcelona Supercomputing Center, 2022-05)
Text en actes de congrés
Accés obertIn modern FPGA devices, place and route has become a difficult task for the underlying FPGA implementation tools. This is caused by an increase of device size and complexity. As devices grow in size and number of resources, ... -
Improving the discovery and clustering of three-dimensional protein patterns with OpenMP
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Text en actes de congrés
Accés obertThe discovery of conserved three-dimensional (3D) amino-acid patterns among a set of protein structures can be useful, for instance, to predict the functions of unknown proteins or for the rational design of multi-target ... -
LEGaTO: Low-energy, secure, and resilient toolset for heterogeneous computing
(Institute of Electrical and Electronics Engineers (IEEE), 2020)
Text en actes de congrés
Accés obertThe LEGaTO project leverages task-based programming models to provide a software ecosystem for Made in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. The aim is to attain one order of ... -
LightDock: a new multi-scale approach to protein-protein docking
(2018-01)
Article
Accés obertMotivation: Computational prediction of protein-protein complex structure by docking can provide structural and mechanistic insights for protein interactions of biomedical interest. However, current methods struggle with ... -
Metodología para la generación y evaluación automática de hardware específico
(2009-09)
Text en actes de congrés
Accés obertEn el área de la bioinformática podemos encontrar aplicaciones que suponen un reto para el diseño de nuevas arquitecturas de procesadores en términos de rendimiento, ya que sus características difieren de las de las ... -
MInGLE: An efficient framework for domain acceleration using low-power specialized functional units
(2016-06)
Article
Accés obertThe end of Dennard scaling leads to new research directions that try to cope with the utilization wall in modern chips, such as the design of specialized architectures. Processor customization utilizes transistors more ... -
OmpSs@cloudFPGA: An FPGA task-based programming model with message passing
(Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés obertNowadays, a new parallel paradigm for energy-efficient heterogeneous hardware infrastructures is required to achieve better performance at a reasonable cost on high-performance computing applications. Under this new paradigm, ... -
OmpSs@FPGA framework for high performance FPGA computing
(Institute of Electrical and Electronics Engineers (IEEE), 2021-12-01)
Article
Accés obertThis paper presents the new features of the OmpSs@FPGA framework. OmpSs is a data-flow programming model that supports task nesting and dependencies to target asynchronous parallelism and heterogeneity. OmpSs@FPGA is the ... -
OmpSs@Zynq All-Programmable SoC Ecosystem
(Association for Computing Machinery (ACM), 2014)
Text en actes de congrés
Accés restringit per política de l'editorialOmpSs is an OpenMP-like directive-based programming model that includes heterogeneous execution (MIC, GPU, SMP, etc.) and runtime task dependencies management. Indeed, OmpSs has largely influenced the recently appeared ... -
OpenMP extensions for FPGA Accelerators
(2009-07)
Text en actes de congrés
Accés obertReconfigurable computing is one of the paths to explore towards low-power supercomputing. However, programming these reconfigurable devices is not an easy task and still requires significant research and development efforts ... -
Performance analysis of a hardware accelerator of dependence management for taskbased dataflow programming models
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés obertAlong with the popularity of multicore and manycore, task-based dataflow programming models obtain great attention for being able to extract high parallelism from applications without exposing the complexity to programmers. ... -
Picos: A hardware runtime architecture support for OmpSs
(Elsevier, 2015-12)
Article
Accés obertOmpSs is a programming model that provides a simple and powerful way of annotating sequential programs to exploit heterogeneity and task parallelism based on runtime data dependency analysis, dataflow scheduling and ... -
Preliminary work on a mechanism for testing a customized architecture
(2009-07)
Text en actes de congrés
Accés obertHardware customization for scientific applications has shown a big potential for reducing power consumption and increasing performance. In particular, the automatic generation of ISA extensions for General-Purpose Processors ... -
Simulating next-generation Cyber-physical computing platforms
(2015)
Text en actes de congrés
Accés restringit per política de l'editorialIn specific domains, such as cyber-physical systems, platforms are quickly evolving to include multiple (many-) cores and programmable logic in a single system-on-chip, while includ- ing interfaces to commodity ... -
Supporting task creation inside FPGA devices
(Barcelona Supercomputing Center, 2019-05-07)
Text en actes de congrés
Accés obertThe most common model to use co-processors/accelerators is the master-slave model where the slaves (coprocessors/ accelerators) are driven by a general purpose cpu. This simplifies the management of the accelerators because ... -
Tareador: a tool to unveil parallelization strategies at undergraduate level
(North Carolina State University, 2015)
Text en actes de congrés
Accés obertThis paper presents a methodology and framework designed to assist students in the process of finding appropriate task decomposition strategies for their sequential program, as well as identifying bottlenecks ... -
Task dependences management hardware acceleration for task-based dataflow programming models
(Barcelona Supercomputing Center, 2015-05-05)
Text en actes de congrés
Accés obertTask-based programming models have gained a lot of attention for being able to explore high parallelism over multicore and manycore, while hiding the difficulties of parallel programming. For applications with moderate ... -
Task-based programming models for heterogeneous recurrent workloads
(Springer Nature, 2021)
Text en actes de congrés
Accés obertThis paper proposes the extension of task-based programming models with recurrent workloads concepts. The proposal introduces new clauses in the OmpSs task directive to efficiently model recurrent workloads. The clauses ... -
The AXIOM platform for next-generation cyber physical systems
(2017-06-03)
Article
Accés obertCyber-Physical Systems (CPSs) are widely used in many applications that require interactions between humans and their physical environment. These systems usually integrate a set of hardware-software components for optimal ...
