Exploració per autor "Manich Bou, Salvador"
Ara es mostren els items 21-40 de 41
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Improving the security of scan path test using differential chains
(2013)
Text en actes de congrés
Accés restringit per política de l'editorialIn this paper we present a new scan-path structure for improving the security of systems including a scan path, which normally introduces a security critical information channel into a design. The structure, named differential ... -
Influence of punch trough stop layer and well depths on the robustness of bulk FinFETs to heavy ions impact
(Institute of Electrical and Electronics Engineers (IEEE), 2022-05-02)
Article
Accés obertThis study analyzes the effects of the punch-through stop (PTS) layer and well depth in a bulk FinFET SRAM cell on the fraction of charge generated by an ion impact that is collected by the FinFET channel. More than 1700 ... -
Information Leakage Reduction at the Scan-Path Output
(2013)
Text en actes de congrés
Accés restringit per política de l'editorialIn this paper we present a new scan-path structure for improving the security of systems including a scan path, which normally introduces a security critical information channel into a design. The structure, named differential ... -
Interleaved Scrambling Technique: A Novel Low-Power Security Layer for Cache Memories
(Institute of Electrical and Electronics Engineers (IEEE), 2014)
Comunicació de congrés
Accés restringit per política de l'editorialMemory systems security has increased over the last decade due to the sensitive information which is stored in plain text. Device specific attacks, such as cold-boot and sidechannel monitoring have been reported as being ... -
Low Cost AES Protection Against DPA Using Rolling Codes
(Curran Associates, Inc., 2021)
Text en actes de congrés
Accés restringit per política de l'editorialMany block cipher algorithms like AES are known to be weak against differential power analysis attacks (DPA) if the executing unit presents certain levels of information leakage, which is a common problem in microprocessors. ... -
On the fitting and improvement of RRAM stanford-based model parameters using TiN/Ti/HfO2/W experimental data
(Institute of Electrical and Electronics Engineers (IEEE), 2022)
Comunicació de congrés
Accés restringit per política de l'editorialThe use of Resistive Random Access Memory (RRAM) devices is becoming pervasive in many applications. In particular, security based primitives can exploit their variability and non-volatility for generating cells for ... -
On the use of error detecting and correcting codes to boost security in caches against side channel attacks
(2015)
Text en actes de congrés
Accés obertMicroprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory remanence is exploited to download its content after the microprocessor has been struck by a hard boot. If just in this moment, a ... -
Preguntes d'Exàmen : Cursos 2015/16 a 2019/20
(Universitat Politècnica de Catalunya, 2020)
Examen
Accés obert -
Programming techniques of resistive random-access memory devices for neuromorphic computing
(2023-11-27)
Article
Accés obertNeuromorphic computing offers a promising solution to overcome the von Neumann bottleneck, where the separation between the memory and the processor poses increasing limitations of latency and power consumption. For this ... -
Random masking interleaved scrambling technique as a countermeasure for DPA/DEMA attacks in cache memories
(2016-11-15)
Text en actes de congrés
Accés obertMemory remanence in SRAMs and DRAMs is usually exploited through cold-boot attacks and the targets are the main memory and the L2 cache memory. Hence, a sudden power shutdown may give an attacker the opportunity to ... -
RRAM based cell for hardware security applications
(2016)
Text en actes de congrés
Accés restringit per política de l'editorialResistive random access memories (RRAMs)have arisen as a competitive candidate for non-volatile memories due to their scalability, simple structure, fast switching speed and compatibility with conventional back-end processes. ... -
RRAM Based Random Bit Generation for Hardware Security Applications
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés obertResistive random access memories (RRAMs) have arisen as a competitive candidate for non-volatile memories due to their scalability, simple structure, fast switching speed and compatibility with conventional back-end ... -
RRAM random number generator based on train of pulses
(2021-07-30)
Article
Accés obertIn this paper, the modulation of the conductance levels of resistive random access memory (RRAM) devices is used for the generation of random numbers by applying a train of RESET pulses. The influence of the pulse amplitude ... -
Serial RRAM cell for secure bit concealing
(2021-07-31)
Article
Accés obertNon-volatile memory cells are exposed to adversary attacks since any active countermeasure is useless when the device is powered off. In this context, this work proposes the association of two serial RRAM devices as a basic ... -
Simulation of serial RRAM cell based on a Verilog-A compact model
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Text en actes de congrés
Accés restringit per política de l'editorialModel-based simulation is one of the effective methods of scientific research. The inherent variability of resistive switching mechanisms has been an obstacle for the massive commercial implementation of the resistive ... -
Sistemes combinacionals : Introducció a les funcions lògiques i a la minimització d’expressions
(Universitat Politècnica de Catalunya, 2017)
Apunts
Accés obert -
The low area probing detector as a countermeasure against invasive attacks
(2017-11-07)
Article
Accés obertMicroprobing allows intercepting data from on-chip wires as well as injecting faults into data or control lines. This makes it a commonly used attack technique against security-related semiconductors, such as smart card ... -
The SALVADOR simulation framework
(2016-11-15)
Text en actes de congrés
Accés obert -
True random number generator based on RRAM-bias current starved ring oscillator
(Institute of Electrical and Electronics Engineers (IEEE), 2023-09-29)
Article
Accés obertThis work presents a RRAM-bias current starved ring oscillator (CSRO) as TRNG, where the cycle-to-cycle variability of a RRAM device is exploited as source of randomness. A simple voltage divider composed of this RRAM and ... -
True random number generator based on the variability of the high resistance state of RRAMs
(Institute of Electrical and Electronics Engineers (IEEE), 2023-01-01)
Article
Accés obertHardware-based security primitives like True Random Number Generators (TRNG) have become a crucial part in protecting data over communication channels. With the growth of internet and cloud storage, TRNGs are required in ...
