Exploració per tema "Computer architecture"
Ara es mostren els items 21-40 de 285
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A two-dimensional architecture for end-to-end resource management in virtual network environments
(2012-09)
Article
Accés restringit per política de l'editorialIn recent years, various network virtualization techniques have been proposed for flexibly supporting heterogeneous services over virtual network platforms. However, systematic views on how virtual network resources (VNRs) ... -
Adaptación a un entorno J2EE desde un sistema centralizado Host
(Universitat Politècnica de Catalunya, 2013-12-20)
Projecte/Treball Final de Carrera
Accés restringit per decisió de l'autorExplain J2EE adaptation process, advantages, functional design, etc. -
Adaptive fault-tolerant architecture for unreliable device technologies
(CRC Press, Taylor and Francis Group, 2013-06-03)
Capítol de llibre
Accés restringit per política de l'editorialNanoelectronic Device Applications Handbook gives a comprehensive snapshot of the state of the art in nanodevices for nanoelectronics applications. Combining breadth and depth, the book includes 68 chapters on topics that ... -
Admission control for multi-tenant radio access networks
(2017)
Text en actes de congrés
Accés restringit per política de l'editorialThe sharing of Radio Access Networks is gaining momentum in small cell scenarios, due to the associated reduction in capital and operational costs. In this scenario, the split of radio resources among tenants sharing the ... -
An Analysis of Lazy and Eager Limited Preemption Approaches under DAG-Based Global Fixed Priority Scheduling
(Institute of Electrical and Electronics Engineers (IEEE), 2017-07-03)
Comunicació de congrés
Accés obertDAG-based scheduling models have been shown to effectively express the parallel execution of current many-core heterogeneous architectures. However, their applicability to real-time settings is limited by the difficulties ... -
An Approach to a Fault Tolerance LISP Architecture
(Springer Verlag, 2011)
Text en actes de congrés
Accés obertNext Generation Internet points out the challenge of addressing "things" on both a network with (wired) and without (wireless) infrastructure. In this scenario, new efficient and scalable addressing and routing schemes ... -
An approximate analysis of synchronous multiple bus
(1985)
Report de recerca
Accés obertThis paper presents an approximate analytic model for evaluating the performance of a loosely coupled multiprocessor architecture whose memory, organized in modules, is shared by all the processors. Each memory module (Mi) ... -
An asynchronous architecture model for behavioral synthesis
(Institute of Electrical and Electronics Engineers (IEEE), 1993)
Text en actes de congrés
Accés obertAn asynchronous architecture model for behavioral synthesis is presented. The basis of the model lies in a distributed control structure consisting of multiple communicating processes. Data processing is performed by ... -
An energy-efficient and scalable eDRAM-based register file architecture for GPGPU
(ACM, 2013)
Text en actes de congrés
Accés restringit per política de l'editorialThe heavily-threaded data processing demands of streaming multiprocessors (SM) in a GPGPU require a large register file (RF). The fast increasing size of the RF makes the area cost and power consumption unaffordable for ... -
An MPEG-4 performance study for non-SIMD, general purpose architectures
(Institute of Electrical and Electronics Engineers (IEEE), 2003)
Text en actes de congrés
Accés obertMPEG-4 is an important international standard with wide applicability. This paper focuses on MPEG-4's main profile, video, whose approach allows more efficiency in coding and more flexibility in managing heterogeneous media ... -
An on-line test strategy and analysis for a 1T1R crossbar memory
(Institute of Electrical and Electronics Engineers (IEEE), 2017)
Text en actes de congrés
Accés obertMemristors are emerging devices known by their nonvolability, compatibility with CMOS processes and high density in circuits density in circuits mostly owing to the crossbar nanoarchitecture. One of their most notable ... -
Analysis and mitigation of writeback cache lock-ups in Linux
(Universitat Politècnica de Catalunya, 2020-06)
Treball Final de Grau
Accés obertLinux caches disk I/O for performance: writes complete immediately from userspace perspective, and are committed to storage later. But in the presence of heavy writers, this buffering can easily hurt system responsiveness ... -
Analysis and optimization of a debug post-silicon hardware architecture
(Universitat Politècnica de Catalunya, 2022-01-24)
Projecte Final de Màster Oficial
Accés restringit per acord de confidencialitatThe goal of this thesis is to analyze the post-silicon validation hardware infrastructure implemented on multicore systems taking as an example Esperanto Technologies SoC, which has thousands of RISC-V processors and targets ... -
Analysis and simulation of data prefetching algorithms for last-level cache memory
(Universitat Politècnica de Catalunya, 2018-06-25)
Projecte Final de Màster Oficial
Accés obert
Realitzat a/amb: České vysoké učení technické v PrazeAnalysis and simulation of data prefetching algorithms for last-level cache memory. Analysis and comparison of one of the latest data prefetching algorithms in terms of performance, network utilization and prefetching accuracy. -
Analysis of CPI variance for dynamic binary translators/optimizers modules
(IEEE, 2012)
Text en actes de congrés
Accés restringit per política de l'editorialDynamic Binary Translators and Optimizers (DBTOs) have been established as a hot research topic. They are used in many different systems, such as emulation, instrumentation tools and innovative HW/SW co-designed ... -
Analysis of NFV service design and management processes using ITIL and eTOM best practices
(Universitat Politècnica de Catalunya, 2017-10-11)
Projecte Final de Màster Oficial
Accés obertThe objective of this project is to analyse the design and process management of NFV and its operations using two of the most widely used and accepted best practices in telecommunication and IT industries. Focusing majorly ... -
Analytical modeling and performance evaluation of cell selection algorithms for mobile networks with backhaul capacity constraints
(2013-10-28)
Article
Accés restringit per política de l'editorialWireless communications technologies play an essential role to support the Public Protection and Disaster Relief (PPDR) operational needs. The current Private/Professional Mobile Radio (PMR) technologies used for PPDR ... -
Análisis de plataformas blockchain para casos de uso de compra/venta de imágenes
(Universitat Politècnica de Catalunya, 2019-05)
Treball Final de Grau
Accés obertIn this project a study of different blockchain technologies with different design purposes is carried out. The chosen technologies are Ethereum and Hyperledger, of which there will be a basic explanation of their operation ... -
Aplicación de reservas interactiva para restaurantes/bares
(Universitat Politècnica de Catalunya, 2021-10-28)
Treball Final de Grau
Accés obert -
Approximate task memoization
(Universitat Politècnica de Catalunya, 2016-10)
Projecte Final de Màster Oficial
Accés restringit per acord de confidencialitat