Exploració per altres contribucions "Mateo Peña, Diego"
Ara es mostren els items 1-20 de 21
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Analysis of the high frequency substrate noise effects on LC-VCOs
(Universitat Politècnica de Catalunya, 2016-01-29)
Tesi
Accés obertLa integració de transceptors per comunicacions de radiofreqüència en CMOS pot quedar seriosament limitada per la interacció entre els seus blocs, arribant a desaconsellar la utilització de un únic dau de silici. El soroll ... -
Caracterizació experimental de circuits RF basada en sensors integrats
(Universitat Politècnica de Catalunya, 2020-01)
Treball Final de Grau
Accés obertLa constante mejora en fabricación de transistores reduciendo su tamaño ha supuestoacentuar efectos de variabilidad en su rendimiento. Para poder mitigar los efectos de estavariabilidad, el chip PAAGEANT tiene como objetivo ... -
Characterization setup for the experimental study of time-dependent variability phenomena in nanoscale circuits
(Universitat Politècnica de Catalunya, 2023-06)
Treball Final de Grau
Accés obert
Realitzat a/amb: IMEC BelgiumThis project consists in an internship at IMEC Belgium for four months. It can be divided in two major parts: Building a chip-oriented prober and conducting some experiments about reliability on chip. -
Characterizing variability and mismatch in FDSOI-28nm technology: application to a ROSC array IC
(Universitat Politècnica de Catalunya, 2021-04)
Projecte Final de Màster Oficial
Accés restringit per acord de confidencialitat -
Desenvolupament d'un circuit microelectrònic en 65 nm CMOS per mesurar el night sky background en l'observatori de CTA
(Universitat Politècnica de Catalunya, 2024-01-29)
Treball Final de Grau
Accés obertL'observatori CTA és un projecte científic d'observació dels raigs gamma provinents de l'espai que generen radiació Cherenkov en travessar l'atmosfera de la Terra. Aquests raigs gamma són capturats per telescopis ... -
Design and implementation of a RS-485 Repeater in an Industrial Environment
(Universitat Politècnica de Catalunya, 2015-06)
Treball Final de Grau
Accés obertThe purpose of this project is to carry out all the process needed to design and check a RS-485 Repeater shield in an industrial environment. First step to be done is to stablish all the product characteristics. Once it ... -
Design of a clock and data recovery circuit in FDSOI technology for high speed serial links
(Universitat Politècnica de Catalunya, 2021-03)
Projecte Final de Màster Oficial
Accés obertThe purpose of this thesis is to design an 8 Gbps clock and data recovery circuit intended to work in the receiver of a high-speed Serializer-Deserializer interface (SerDes). The proposed architecture is based on a ... -
Design of a RF communication receiver front-end for ultra-low power and voltage applications in a FDSOI 28nm technology
(Universitat Politècnica de Catalunya, 2019-05-31)
Projecte Final de Màster Oficial
Accés obertThe advances in the semiconductor and wireless industry have enabled the expansion of new paradigms, which have given rise to concepts like Internet of Things (IoT). Apart from qualities like size, speed or cost, the ... -
Design of a Voltage Controlled Delay line using a 65nm CMOS technology
(Universitat Politècnica de Catalunya, 2023-07-03)
Treball Final de Grau
Accés obertThe objective of this work is to develop a high-performance digital circuit that can provide delayed versions of an original clock signal, with precious delays and robust signals. To achieve this, we have designed and ... -
Design of broadband inductor-less RF front-ends with high dynamic range for G.hn
(Universitat Politècnica de Catalunya, 2012-07-06)
Tesi
Accés obertSystem-on-Chip (SoC) was adopted in recent years as one of the solutions to reduce the cost of integrated systems. When the SoC solution started to be used, the final product was actually more expensive due to lower yield. ... -
Design, Implementation and Measurements of a High-Speed Link using Aurora Protocol
(Universitat Politècnica de Catalunya, 2022-07-08)
Treball Final de Grau
Accés restringit per acord de confidencialitat
Realitzat a/amb: Imasenic Advanced ImagingAs communication rates continue to increase, data is being moved within systems at ever higher speeds. In the past 15 years, the industry has seen interconnection speeds increase from 1 Gbps to over 50 Gbps. The challenge ... -
Development of a numerical method to study the diffusion of SERS NPs in resected tissue for binding potential assessment and evaluation
(Universitat Politècnica de Catalunya, 2016-07-19)
Treball Final de Grau
Accés obert
Realitzat a/amb: Illinois Institute of TechnologyAn intraoperative approach for breast tumor-margin assessment is presented, using a kinetic model for surface-enhanced Raman scattering nanoparticles (SERS NPs). A numerical method is developed to understand the behavior ... -
Development of high-speed serial interface output link for image sensor ICs
(Universitat Politècnica de Catalunya, 2022-05-27)
Projecte Final de Màster Oficial
Accés restringit per acord de confidencialitat
Realitzat a/amb: Imasenic Advanced ImagingThis thesis presents a sub low voltage differential signalling (sub-LVDS) transmitter for a high-speed serial interface application in an image sensor integrated circuit (IC). The targeted data rate of the circuit is 0.89 ... -
Disseny d'un sistema ATE per la verificació de ECU
(Universitat Politècnica de Catalunya, 2020-06)
Treball Final de Grau
Accés obert
Realitzat a/amb: Scentia ElectronicsEste trabajo es la continuación de un proyecto realizado en la empresa SCENTIA ELECTRONICS. Este consta del diseño y montaje de un sistema ATE (Automatic Test Equipment) para verificar el correcto funcionamiento de una ECU ... -
Disseny d'una resistència activa per a un circuit integrador en 65 nm per a capturar el Night Sky Background en observatoris Cherenkov Telescope Array
(Universitat Politècnica de Catalunya, 2023-07-03)
Treball Final de Grau
Accés obertThe project focuses on the context of CTA (Cherenkov Telescope Array) telescopes used for gamma ray detection, in particular Large-Sized Telescopes (LSTs). The main objective is to replace PMTs sensors and their readout ... -
Experimental characterization of Random Telegraph Noise in FDSOI technology and its application for security primitives
(Universitat Politècnica de Catalunya, 2022-06)
Projecte Final de Màster Oficial
Accés obertThe shrinking of transistors and consequent decrease in operational voltage, specially for Ultra-Low Voltage (ULV) applications such as IoT, has driven current technology to be very sensitive to the effects of random ... -
Experimental monitoring of the gain in RF Power Amplifiers using Temperature Measurements
(Universitat Politècnica de Catalunya, 2022-05-24)
Projecte Final de Màster Oficial
Accés obertThe Aging effect is intrinsic to transistors in integrated circuits and occurs sooner with newer, smaller manufacturing node technologies. With prolonged usage within the nominal power and biasing operating point, some ... -
Register configuration, design validation and improvements for a driver monitoring camera
(Universitat Politècnica de Catalunya, 2021-07-06)
Treball Final de Grau
Accés restringit per acord de confidencialitat -
Self compensation of Aging in Integrated Circuits using built-in temperature measurements.
(Universitat Politècnica de Catalunya, 2023-07-03)
Treball Final de Grau
Accés obertOne of the main threats regarding CMOS devices is their degradation due to transistor aging, degrading performance such as the gain of the amplifiers formed by these devices. In order to extend their lifespan, a bias voltage ... -
Study of ASIC serial memory interface design
(Universitat Politècnica de Catalunya, 2020-08)
Treball Final de Grau
Accés obertThis degree thesis is about the design of the transmitter of a high-speed serial link interface to communicate an ASIC with a FPGA board. Using this serial interface, the ASIC will be able to access via FPGA the DDR3 RAM ...
