Now showing items 1-20 of 46

    • A 16-kV HBM RF ESD Protection Codesign for a 1-mW CMOS Direct Conversion Receiver Operating in the 2.4-GHz ISM Band 

      González Jiménez, José Luis; Solar, H.; Adin, Iñigo; Mateo Peña, Diego; Berenguer, Roc (2011-09)
      Article
      Restricted access - publisher's policy
      A decreasing-sized π -model electrostatic discharge (ESD) protection structure is presented and applied to protect against ESD stresses at the RF input pad of an ultra-low power CMOS front-end operating in the 2.4-GHz ...
    • A 75 pJ/bit All-Digital Quadrature Coherent IR-UWB Transceiver in 0.18 um CMOS 

      Barajas Ojeda, Enrique; Gómez Salinas, Dídac; Mateo Peña, Diego; González Jiménez, José Luis (2010-05-23)
      Conference report
      Open Access
      In this paper a 75 pJ/b all-digital quadrature coherent impulse radio ultra-wideband transceiver in 0.18 μm CMOS is presented. It consumes 42 mW operating at a 560 Mbps datarate. The receiver and transmitter share most ...
    • A high dynamic-range RF programmable-gain front end for G.hn RF-Coax in 65-nm CMOS 

      Trulls Fortuny, Xavier; Mateo Peña, Diego; Bofill, Adrià (IEEE Microwave Theory and Techniques Society, 2012-10)
      Article
      Restricted access - publisher's policy
      A high-dynamic-range programmable-gain inductorless RF front end suitable for the RF-coax bandplan of the G.hn recommendation is presented. A double-input RF programmable gain amplifier (DI-RFPGA) with switchable capacitive ...
    • A versatile CMOS transistor array IC for the statistical characterization of time-zero variability, RTN, BTI, and HCI 

      Diaz Fortuny, Javier; Martin Martínez, Javier; Rodríguez Martínez, Rosana; Castro López, Rafael; Roca Moreno, Elisenda; Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Mateo Peña, Diego; Fernández Fernández, Francisco V.; Nafría Maqueda, Montserrat (2018-01-01)
      Article
      Open Access
      Statistical characterization of CMOS transistor variability phenomena in modern nanometer technologies is key for accurate end-of-life prediction. This paper presents a novel CMOS transistor array chip to statistically ...
    • Advanced failure detection techniques in deep submicron CMOS integrated circuits 

      Rubio Sola, Jose Antonio; Altet Sanahujes, Josep; Mateo Peña, Diego (Pergamon Press, 2009)
      Conference report
      Restricted access - publisher's policy
      The test of present integrated circuits exhibits many confining aspects, among them the adequate selection of the observable variables, the use of combined testing approaches, an each time more restricted controllability ...
    • Aging in CMOS RF linear power amplifiers: an experimental study 

      Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Crespo Yepes, Albert; Mateo Peña, Diego; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat (IEEE Microwave Theory and Techniques Society, 2021-02-01)
      Article
      Restricted access - publisher's policy
      An extensive experimental analysis of the hot carrier injection (HCI) and bias temperature instability (BTI) aging effects on RF linear power amplifiers (PAs) is presented in this article. Two different 2.45-GHz PA topologies ...
    • Aging in CMOS RF linear power amplifiers: experimental comparison and modeling 

      Aragonès Cervera, Xavier; Mateo Peña, Diego; Barajas Ojeda, Enrique; Crespo-Yepes, A.; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat (Institute of Electrical and Electronics Engineers (IEEE), 2019)
      Conference report
      Restricted access - publisher's policy
      This paper characterizes experimentally the aging degradation experienced by two different 2.45 GHz power amplifier circuits of similar performance, implemented in a 65 nm CMOS technology. Results demonstrate the importance ...
    • Analysis of body bias and RTN-induced frequency shift of low voltage ring oscillators in FDSOI technology 

      Barajas Ojeda, Enrique; Aragonès Cervera, Xavier; Mateo Peña, Diego; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Martin Martínez, Javier; Rodríguez Martínez, Rosana; Porti Pujal, Marc; Nafria, M.; Castro López, Rafael; Roca Moreno, Elisenda; Fernandez, Francisco V. (Institute of Electrical and Electronics Engineers (IEEE), 2018)
      Conference report
      Restricted access - publisher's policy
      Electronic circuits powered at ultra low voltages (500 mV and below) are desirable for their low energy and power consumption. However, RTN (Random Telegraph Noise)-induced threshold voltage variations become very significant ...
    • Behavioural modelling of DLLs for fast simulation and optimisation of jitter and power consumption 

      Barajas Ojeda, Enrique; Mateo Peña, Diego; González Jiménez, José Luis (IEEE Computer Society Publications, 2010)
      Conference report
      Open Access
      This paper presents a behavioural model for fast DLL simulations. The behavioural model includes a modelling of the various noise sources in the DLL that produce output jitter. The model is used to obtain the dependence ...
    • CATRENE-PANAMA WP1: integrated PA Milestone M1.3 technology, approach & system choice for home networking 

      Dufis, Cédric Yvan; Mateo Peña, Diego; Bofill, Adrià; González Jiménez, José Luis (2009-10-30)
      External research report
      Open Access
    • Converses sobre disseny digital: dubtes a l'hora de fer una simulació 

      Altet Sanahujes, Josep; Rubio Sola, Jose Antonio; Bardés Llorensí, Daniel; Calderer Cardona, Josep; Pons Nin, Joan; Mateo Peña, Diego; Martín, Isidro (Departament d'Enginyeria Electrònica, 2016-10-25)
      Audiovisual
      Open Access
    • DC temperature measurements for power gain monitoring in RF power amplifiers 

      Altet Sanahujes, Josep; Mateo Peña, Diego; Gómez Salinas, Dídac; Perpiñà, Xavier; Jordà, Xavier (IEEE, 2012)
      Conference report
      Restricted access - publisher's policy
      In this paper we demonstrate that the steady state temperature increase due to the power dissipated by the circuit under test can be used as observable to test the gain of a 2GHz linear class A Power Amplifier. As a proof ...
    • DC temperature measurements to characterize the central frequency and 3 dB bandwidth in mmW power amplifiers 

      Aragonès Cervera, Xavier; Mateo Peña, Diego; González Jiménez, José Luis; Vidal López, Eva María; Gómez Salinas, Didac; Martineau, B; Altet Sanahujes, Josep (2015-11)
      Article
      Open Access
      This letter shows how a temperature sensor and a simple DC voltage multimeter can be used as instruments to determine the central frequency and 3 dB bandwidth of a 60 GHz linear power amplifier (PA). Compared to previous ...
    • Desenvolupament d'un sistema de comunicacions integrat per part d'estudiants de 2on cicle de l'ETSETB de la Universitat Politècnica de Catalunya 

      González Jiménez, José Luis; Mateo Peña, Diego; Aragonès Cervera, Xavier (Universitat Politècnica de Catalunya. Institut de Ciències de l'Educació, 2005-02)
      Conference report
      Open Access
      El projecte ha consistit en el disseny i fabricació d’un circuit integrat que conté un receptor Bluetooth per a xarxes sense fils en una tecnologia CMOS de 0,35 m. Els objectius del projecte eren realitzar una experiència ...
    • Design of a 2.5-GHZ QVCO robust against high frequency substrate noise 

      Molina Garcia, Marc Manel; Gómez Salinas, Dídac; Aragonès Cervera, Xavier; Mateo Peña, Diego; González Jiménez, José Luis (2011-07)
      Article
      Restricted access - publisher's policy
      This work presents the design procedure followed to obtain a low-power voltage-controlled oscillator (VCO) robust against high-frequency substrate noise, using as a demonstrator a 2.5 GHz VCO with quadrature outputs (QVCO) ...
    • Design of a broadband CMOS RF power amplifier to establish device-circuit aging correlations 

      Barajas Ojeda, Enrique; Mateo Peña, Diego; Aragonès Cervera, Xavier; Crespo Yepes, Albert; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat (Institute of Electrical and Electronics Engineers (IEEE), 2017)
      Conference report
      Restricted access - publisher's policy
      This paper presents the design of a Broadband CMOS RF Power Amplifier, suitable to be stressed at circuit level but with the possibility to be measured both at circuit and at device level. It allows establishing a relation ...
    • Design of reconfigurable RF circuits for self compensation 

      Gómez Salinas, Dídac; Mateo Peña, Diego (2010)
      Conference lecture
      Open Access
      In this paper we will show how a combination of design choices allows for the design of a PVT robust RF front-end with minimum area, power and nominal specifications penalty.
    • Differential temperature sensors: Review of applications in the test and characterization of circuits, usage and design methodology 

      Barajas Ojeda, Enrique; Aragonès Cervera, Xavier; Mateo Peña, Diego; Altet Sanahujes, Josep (Multidisciplinary Digital Publishing Institute (MDPI), 2019-11-05)
      Article
      Open Access
      Differential temperature sensors can be placed in integrated circuits to extract a signature ofthe power dissipated by the adjacent circuit blocks built in the same silicon die. This review paper firstdiscusses the singularity ...
    • Diseño de circuitos y sistemas integrados 

      Rubio, Antonio; Altet Sanahujes, Josep; Aragonès Cervera, Xavier; González Jiménez, José Luis; Mateo Peña, Diego; Moll Echeto, Francisco de Borja (Edicions UPC, 2003)
      Book
      Restricted access to UB, UAB, UPC, UPF, UdG, UdL, URV, UOC, BC, UVic, UJI, URL, UIC users
      La tecnología de circuitos integrados, basada principalmente en la miniaturización de los circuitos ha evolucionado intensamente en los últimos tiempos. El objetivo de esta obra es dar a conocer esta evolución reciente y ...
    • DLL's behavioral modeling for power consumption and jitter fast optimization 

      Barajas Ojeda, Enrique; Mateo Peña, Diego; González Jiménez, José Luis (2010)
      Conference report
      Open Access
      This paper analyzes the sources of jitter in a DLL and presents a behavioral model for fast DLL optimization. An algorithm to simulate the DLL in open loop is demonstrated. This procedure, together with the behavioral ...