Exploració per autor "Mateo Peña, Diego"
Ara es mostren els items 1-20 de 60
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A 16-kV HBM RF ESD Protection Codesign for a 1-mW CMOS Direct Conversion Receiver Operating in the 2.4-GHz ISM Band
(2011-09)
Article
Accés restringit per política de l'editorialA decreasing-sized π -model electrostatic discharge (ESD) protection structure is presented and applied to protect against ESD stresses at the RF input pad of an ultra-low power CMOS front-end operating in the 2.4-GHz ... -
A 75 pJ/bit All-Digital Quadrature Coherent IR-UWB Transceiver in 0.18 um CMOS
(2010-05-23)
Text en actes de congrés
Accés obertIn this paper a 75 pJ/b all-digital quadrature coherent impulse radio ultra-wideband transceiver in 0.18 μm CMOS is presented. It consumes 42 mW operating at a 560 Mbps datarate. The receiver and transmitter share most ... -
A high dynamic-range RF programmable-gain front end for G.hn RF-Coax in 65-nm CMOS
(IEEE Microwave Theory and Techniques Society, 2012-10)
Article
Accés restringit per política de l'editorialA high-dynamic-range programmable-gain inductorless RF front end suitable for the RF-coax bandplan of the G.hn recommendation is presented. A double-input RF programmable gain amplifier (DI-RFPGA) with switchable capacitive ... -
A low-power RF front-end for 2.5 GHz receivers
(Institute of Electrical and Electronics Engineers (IEEE), 2008)
Text en actes de congrés
Accés obertThis paper presents a low power and low cost front end for a direct conversion 2.5 GHz ISM band receiver composed of a 16 kV HBM ESD protected LNA, differential Gilbert-cell mixers, and high-pass filters for DC offset ... -
A versatile CMOS transistor array IC for the statistical characterization of time-zero variability, RTN, BTI, and HCI
(2018-01-01)
Article
Accés obertStatistical characterization of CMOS transistor variability phenomena in modern nanometer technologies is key for accurate end-of-life prediction. This paper presents a novel CMOS transistor array chip to statistically ... -
Advanced failure detection techniques in deep submicron CMOS integrated circuits
(Pergamon Press, 2009)
Text en actes de congrés
Accés restringit per política de l'editorialThe test of present integrated circuits exhibits many confining aspects, among them the adequate selection of the observable variables, the use of combined testing approaches, an each time more restricted controllability ... -
Aging in CMOS RF linear power amplifiers: an experimental study
(IEEE Microwave Theory and Techniques Society, 2021-02-01)
Article
Accés obertAn extensive experimental analysis of the hot carrier injection (HCI) and bias temperature instability (BTI) aging effects on RF linear power amplifiers (PAs) is presented in this article. Two different 2.45-GHz PA topologies ... -
Aging in CMOS RF linear power amplifiers: experimental comparison and modeling
(Institute of Electrical and Electronics Engineers (IEEE), 2019)
Text en actes de congrés
Accés restringit per política de l'editorialThis paper characterizes experimentally the aging degradation experienced by two different 2.45 GHz power amplifier circuits of similar performance, implemented in a 65 nm CMOS technology. Results demonstrate the importance ... -
An approach to dynamic power consumption current testing of CMOS ICs
(Institute of Electrical and Electronics Engineers (IEEE), 1995)
Text en actes de congrés
Accés obertI/sub DDQ/ testing is a powerful strategy for detecting defects that do not alter the logic behavior of CMOS ICs. Such a technique is very effective especially in the detection of bridging defects although some opens can ... -
An ultra low-voltage RF front-end receiver for IoT devices
(Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés restringit per política de l'editorialThis paper presents the design of an RF receiver front-end for IoT application, integrating a low noise amplifier (LNA) and an active mixer. The circuit is designed in 28-nm FDSOI technology, to operate on the ISM 2.4-2.5 ... -
Analysis of body bias and RTN-induced frequency shift of low voltage ring oscillators in FDSOI technology
(Institute of Electrical and Electronics Engineers (IEEE), 2018)
Text en actes de congrés
Accés restringit per política de l'editorialElectronic circuits powered at ultra low voltages (500 mV and below) are desirable for their low energy and power consumption. However, RTN (Random Telegraph Noise)-induced threshold voltage variations become very significant ... -
Analysis of ISSQ/IDDQ testing implementation and circuit partitioning in CMOS cell-based design
(Institute of Electrical and Electronics Engineers (IEEE), 1996)
Text en actes de congrés
Accés obertDifference between ISSQ and IDDQ testing strategies is presented, discussing the dependency of area overhead and sensing speed on the technology. The current sensor implementation style suitable for cell-based design ... -
Behavioural modelling of DLLs for fast simulation and optimisation of jitter and power consumption
(IEEE Computer Society Publications, 2010)
Text en actes de congrés
Accés obertThis paper presents a behavioural model for fast DLL simulations. The behavioural model includes a modelling of the various noise sources in the DLL that produce output jitter. The model is used to obtain the dependence ... -
BPF-based thermal sensor circuit for on-chip testing of RF circuits
(Multidisciplinary Digital Publishing Institute (MDPI), 2021-01)
Article
Accés obertA new sensor topology meant to extract figures of merit of radio-frequency analog integrated circuits (RF-ICs) was experimentally validated. Implemented in a standard 0.35 µm complementary metal-oxide-semiconductor (CMOS) ... -
CATRENE-PANAMA WP1: integrated PA Milestone M1.3 technology, approach & system choice for home networking
(2009-10-30)
Report de recerca
Accés obert -
Characterization of the substrate noise spectrum for mixed-signal ICs
(Institute of Electrical and Electronics Engineers (IEEE), 2005)
Text en actes de congrés
Accés obertThis paper presents a simplified analytical model of the substrate noise generated by digital circuitry that captures the most relevant frequency domain characteristics and relates them with parameters of the digital circuit ... -
CMOS inverter performance degradation and its correlation with BTI, HCI and OFF state MOSFETs aging
(2022-05-01)
Article
Accés restringit per política de l'editorialIn this work, CMOS inverters are subjected to electrical stress emulating a complete operation cycle and the shifts in the performance parameters (i.e., peak current and inversion voltage) evaluated. Moreover, degradation ... -
Converses sobre disseny digital: dubtes a l'hora de fer una simulació
(Departament d'Enginyeria Electrònica, 2016-10-25)
Audiovisual
Accés obert -
DC temperature measurements for power gain monitoring in RF power amplifiers
(IEEE, 2012)
Text en actes de congrés
Accés restringit per política de l'editorialIn this paper we demonstrate that the steady state temperature increase due to the power dissipated by the circuit under test can be used as observable to test the gain of a 2GHz linear class A Power Amplifier. As a proof ... -
DC temperature measurements to characterize the central frequency and 3 dB bandwidth in mmW power amplifiers
(2015-11)
Article
Accés obertThis letter shows how a temperature sensor and a simple DC voltage multimeter can be used as instruments to determine the central frequency and 3 dB bandwidth of a 60 GHz linear power amplifier (PA). Compared to previous ...
