Now showing items 1-3 of 3

    • AER-RT: Interfaz de Red con Topología en Anillo para SNN Multi-FPGA 

      Dorta Pérez, Silvestre Taho (Universitat Politècnica de Catalunya, 2013-07-08)
      Master thesis
      Open Access
      [ANGLÈS] This thesis presents AER-RT network interface, a network interface designed to work together a Multiprocessor System (MPS) and create an efficient and scalable multi-chip SNN network. The objective of AER-RT is ...
    • AER-SRT: scalable spike distribution by means of synchronous serial ring topology address event representation 

      Dorta Pérez, Silvestre Taho; Zapata Rodríguez, Mireya; Madrenas Boadas, Jordi; Sánchez Rivera, Giovanny (2016-01-01)
      Article
      Open Access
      Given the massive number of interconnects in Spiking Neural Networks (SNNs), distributing spikes effciently becomes a critical issue for the efficient hardware emulation of large-scale SNNs. In this work, the AER-SRT ...
    • SNAVA—A real-time multi-FPGA multi-model spiking neural network simulation architecture 

      Sripad T A, Athul; Sánchez Rivera, Giovanny; Zapata Rodríguez, Mireya; Pirrone, Vito; Dorta Pérez, Silvestre Taho; Cambria, Salvatore; Marti, Albert; Krishnamourthy, Karthikeyan; Madrenas Boadas, Jordi (2018-01-01)
      Article
      Open Access
      Spiking Neural Networks (SNN) for Versatile Applications (SNAVA) simulation platform is a scalable and programmable parallel architecture that supports real-time, large-scale, multi-model SNN computation. This parallel ...