Browsing by Contributor "Aragonès Cervera, Xavier"

Now showing items 1-20 of 34

    • A Low-Power High-Resolution Delta-Sigma ADC IP in 22 nm CMOS Technology for Smart Sensing Applications 

      Deltor Cortés, Eva María (Universitat Politècnica de Catalunya, 2023-09-08)
      Master thesis
      Restricted access - confidentiality agreement
      The present project comprises the third generation of $\Delta\Sigma$ ADCs developed at the IMB-CNM with the design of a 16-bit 50-kHz $\Delta\Sigma$ modulator circuit as a mixed-signal IP block in the 22-nm 0.8-V FD-SOI ...

    • Analysis of the high frequency substrate noise effects on LC-VCOs 

      Molina Garcia, Marc-Manel (Universitat Politècnica de Catalunya, 2016-01-29)
      Doctoral thesis
      Open Access
      La integració de transceptors per comunicacions de radiofreqüència en CMOS pot quedar seriosament limitada per la interacció entre els seus blocs, arribant a desaconsellar la utilització de un únic dau de silici. El soroll ...

    • Characterization of 28 nm FDSOI MOS and application to the design of a low-power 2.4 GHz LNA 

      Río Jiménez, Jaume del (Universitat Politècnica de Catalunya, 2017-05)
      Master thesis
      Open Access
      IoT is expected to connect billions of devices all over world in the next years, and in a near future, it is expected to use LR-WPAN in a wide variety of applications. Not all the devices will require of high performance ...

    • Characterizing variability and mismatch in FDSOI-28nm technology: application to a ROSC array IC 

      Goxhaj, Dionis (Universitat Politècnica de Catalunya, 2021-04)
      Master thesis
      Restricted access - confidentiality agreement

    • Design and Physical Implementation of a Phase-Locked Loop for CMOS Image Sensors 

      Hornos Gómez, Ismael (Universitat Politècnica de Catalunya, 2024-10-28)
      Master thesis
      Restricted access - confidentiality agreement
      A CMOS image sensor is a device that requires a High-Speed Clock with a nearly ideal 50 % duty cycle to transfer the generated data with a high data rate. The implementation of this clock is usually achieved by means of a ...

    • Design of a 12-bit ramp ADC in 250 nm for image sensor ICs 

      Reboll Meliá, Fernando (Universitat Politècnica de Catalunya, 2023-07-12)
      Master thesis
      Restricted access - confidentiality agreement
      Covenantee:   Imasenic Advanced Imaging
      This thesis presents the design of a 12-bit single slope ADC embedded in an image sensor integrated circuit (IC) that takes advantage of the signal-dependent photon-shot noise characteristic inherent in image sensors. It ...

    • Design of a 16-bit 50-kHz low-power SC delta-sigma modulator for ADC in 0.18um CMOS technology 

      Cisneros Fernández, Jose Agustin (Universitat Politècnica de Catalunya, 2016-07-18)
      Master thesis
      Open Access
      A general purpose 16 Bits Sigma-Delta modulator ADC for double precision audio 50 kHz bandwidth, targeted for Low-power operation, involving no additional digital circuit compensation, no bootstrapping techniques and ...

    • Design of a 3.125 Gbps CameraLink interface for machine vision cameras 

      Hesham Mohamed Yehia Fadl (Universitat Politècnica de Catalunya, 2020-05)
      Master thesis
      Restricted access - author's decision

    • Design of a CMOS power amplifier and built-in sensors for variability monitoring and compensation 

      Fernández Tomás, Alejandro (Universitat Politècnica de Catalunya, 2017-10)
      Master thesis
      Open Access
      This research thesis aims to develop a system composed by a a CMOS power amplifier and built-in sensors for variability monitoring and compensation. The integration of monitoring systems with high frequency analog circuits ...

    • Design of a CMOS temperature sensor in 180 nm for image sensor ICs 

      Font Garcia, Albert (Universitat Politècnica de Catalunya, 2020-01)
      Master thesis
      Restricted access - confidentiality agreement
      A temperature sensor based on a diode-connected BJT will be designed for the −40 ºC to +100 ºC temperature range and an accuracy of ±1.5 ºC after a one–point calibration. The sensor will be developed from a theoretical ...

    • Design of a rail-to-rail OTA in 65 nm CMOS technology for a particle detector sensor 

      López Guillén, Alberto (Universitat Politècnica de Catalunya, 2023-07-02)
      Master thesis
      Open Access
      Covenantee:   Universitat de Barcelona. Institut de Ciències del Cosmos
      In the context of particle accelerators for experimental physics, the different detectors convert the energy of a determined particle into an electrical current. This electrical current is then processed using a readout ...

    • Design of a RF communication receiver front-end for ultra-low power and voltage applications in a FDSOI 28nm technology 

      Álvarez Sabaté, Àlex (Universitat Politècnica de Catalunya, 2019-05-31)
      Master thesis
      Open Access
      The advances in the semiconductor and wireless industry have enabled the expansion of new paradigms, which have given rise to concepts like Internet of Things (IoT). Apart from qualities like size, speed or cost, the ...

    • Design of an Output Interface for an In-Memory-Computing CNN Accelerator 

      Martínez Buil, Paula (Universitat Politècnica de Catalunya, 2020-11-27)
      Master thesis
      Open Access
      Analog in-memory computing accelerators are one of the most promising solutions to reduce data movement limitations in deep neural networks (DNNs). While analog in-memory computing accelerators have been studied in many ...

    • Design of CMOS Active Inductors and their use in tuned narrowband and wideband-extension Low Noise Amplifier 

      Rohan Suresh, Dhuri (Universitat Politècnica de Catalunya, 2014-06)
      Bachelor thesis
      Open Access
      The evolution of CMOS technology has allowed the integration of communication systems on a single chip. A Low-Noise Amplifier (LNA) is the first block in an integrated receiver and its design is critical for the system ...

    • Design of low-dropout regulator for ultra low power on-chip applications 

      Aymerich Gubern, Joan (Universitat Politècnica de Catalunya, 2016-02-05)
      Master thesis
      Open Access
      Low Drop Out (LDO) voltage regulators are commonly used to supply low-voltage digital circuits such as microprocessor cores. These digital circuits normally are continuously changing from one mode of operation to another. ...

    • Design, fabrication and characterization of Bulk Acoustic Wave Resonators 

      Calleja Luque, Mònica (Universitat Politècnica de Catalunya, 2020-06)
      Bachelor thesis
      Open Access
      Covenantee:   University of Colorado Colorado Springs
      The constant demand for higher speed and larger bandwidths together with the massive development of personal communications systems, navigation, satellite communications as well as personal computer and data processing ...

    • Development of an automated environment for characterization and durability test of integrated antennas for automobiles 

      Soto Lamata, Irati (Universitat Politècnica de Catalunya, 2017-07)
      Master thesis
      Open Access
      During the last years, the automobile is transforming into a fully-communicated system, supporting all kind of communication types and standards (digital and analog radio, telephone, GPS and/or other positioning standards, ...

    • Development of Analogue circuits for the BETA ASIC HERD-FIT detector 

      Iraola Zapiain, Aitor (Universitat Politècnica de Catalunya, 2021-05)
      Master thesis
      Open Access
      The Electronics Instrumentation Service of the Insittute of Cosmos Science of the University of Barcelona (ICCUB-SiUB) is focused on developing ultrafast readout electronics for high-energy physics and medical imaging. In ...

    • Diseño y fabricación de líneas de retardo en LTCC 

      Benet Colom, Pablo (Universitat Politècnica de Catalunya, 2015-10-28)
      Master thesis
      Open Access
      Covenantee:   Francisco Albero
      In this master's Thesis, a new structure of differential delay line in LTCC was designed, exploiting the benefits that offer this technology for telecommunications and the stacking capability of multiple layers, which let ...

    • Disseny d'un convertidor Temps a Digital per a sensor d'imatge CMOS 

      Palmero Arans, Vicenç (Universitat Politècnica de Catalunya, 2022-07-08)
      Bachelor thesis
      Restricted access - confidentiality agreement
      Covenantee:   Imasenic Advanced Imaging
      Nowadays the importance of image sensing for the optimization of industry processes, medicine, security, etc is unquestionable. This sensing is mostly implemented by an array of pixels that acquire information from the ...