Browsing by Author "Trilla Rodríguez, David"
Now showing items 1-12 of 12
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An approach for detecting power peaks during testing and breaking systematic pathological behavior
(Institute of Electrical and Electronics Engineers (IEEE), 2019)
Conference report
Open AccessThe verification and validation process of embedded critical systems requires providing evidence of their functional correctness and also that their non-functional behavior stays within limits. In this work, we focus on ... -
Cache side-channel attacks and time-predictability in high-performance critical real-time systems
(Association for Computing Machinery (ACM), 2018-06-24)
Conference lecture
Open AccessEmbedded computers control an increasing number of systems directly interacting with humans, while also manage more and more personal or sensitive information. As a result, both safety and security are becoming ubiquitous ... -
De-RISC: the First RISC-V space-grade platform for safety-critical systems
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open AccessThe increasing needs for performance in the space domain for highly autonomous systems calls for more powerful space MPSoCs and appropriate hypervisors to master them. These platforms must adhere to strict reliability, ... -
Disseny i avaluació d'un cluster HPC: Hardware
(Universitat Politècnica de Catalunya, 2014-06-26)
Bachelor thesis
Open Access[CASTELLÀ] El trabajo está centrado en el ámbito del hardware para computación de altas prestaciones. En este trabajo concreto se explica cual es el hardware mas usado en HPC, se diseña un clúster teórico, y se explica ... -
Modeling the impact of process variations in worst-case energy consumption estimation
(Institute of Electrical and Electronics Engineers (IEEE), 2019)
Conference report
Open AccessThe advent of autonomous power-limited systems poses a new challenge for system verification. Powerful processors needed to enable autonomous operation, are typically power-hungry, jeopardizing battery duration. Therefore, ... -
Modelling Contention in Multicore Hardware Resources during Early Design Stages of Real-Time Systems
(Universitat Politècnica de Catalunya, 2016-07)
Master thesis
Open AccessThis thesis presents a modelling approach for the timing behavior of real-time embedded systems in early design phases. The model focuses on multicore processors and it predicts the contention tasks suffer in the access ... -
Non-functional considerations of time-randomized processor architectures
(Universitat Politècnica de Catalunya, 2020-12-04)
Doctoral thesis
Open AccessCritical Real-Time Embedded Systems (CRTES) are the subset of embedded systems with timing constraints whose miss behavior can endanger human lives or expensive equipment. To provide evidence of correctness, CRTES are ... -
Randomization for safer, more reliable and secure, high-performance automotive processors
(Institute of Electrical and Electronics Engineers (IEEE), 2019-12)
Article
Open AccessThe automotive domain is witnessing a relentless transition to autonomous cars demanding high-performance processors to timely execute complex, critical, decision-making software. The other side of the coin is that ... -
SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open AccessSafety-related systems, such as those in automotive, avionics and space, impose the existence of appropriate safety measures to meet the safety requirements of the system. In the case of the highest integrity level ... -
SafeSU: an extended statistics unit for multicore timing interference
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open AccessStatistics units (SUs) in MPSoCs are becoming increasingly used for the (1) verification and (2) validation of multicore timing interference, as well as for (3) deploying safety measures in safety-related real-time systems. ... -
SafeTI: a hardware traffic injector for MPSoC functional and timing validation
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open AccessFunctional and timing validation of safety-related MPSoCs requires testing specific traffic patterns in the on-chip interconnects. Generally, testing needs to be performed by using software tests whose degree of control ... -
Worst-case energy consumption: A new challenge for battery-powered critical devices
(Institute of Electrical and Electronics Engineers (IEEE), 2021-07-01)
Article
Open AccessThe number of devices connected to the IoT is on the rise, reaching hundreds of billions in the next years. Many devices will implement some type of critical functionality, for instance in the medical market. Energy awareness ...
