Now showing items 1-20 of 31

  • 8T SRAM Cell with Open Defects under Voltage and Timing Variations 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Castillo Muñoz, Raul (2011)
    Conference report
    Open Access
  • A combinatorial method for the evaluation of yield of fault-tolerant systems-on-chip 

    Suñé, Víctor; Rodríguez Montañés, Rosa; Carrasco, Juan A.; Munteanu, D-P (2003)
    Conference report
    Open Access
    In this paper we develop a combinatorial method for the evaluation of yield of fault-tolerant systems-on-chip. The method assumes that defects are produced according to a model in which defects are lethal and affect given ...
  • Adaptació del mapa actual de competències transversals de l'ETSEIB a l'EEES 

    Rodríguez Montañés, Rosa; Consul Porras, M. Nieves; Costa Martínez, M. Carme; Roure Fernández, Francisco; Ruiz Mansilla, Rafael; Crivillé Mauricio, Oriol; Martín Pfeiffer, Gunther; Vidal Parreu, Arnau (Universitat Politècnica de Catalunya. Institut de Ciències de l'Educació, 2010-02-11)
    Conference lecture / Conference report
    Open Access
    Un dels objectius principals del projecte consisteix en la detecció, classificació i anàlisi de les competències transversals/genèriques que s'estan treballant dins les assignatures troncals i/o optatives de l'actual pla ...
  • Backside polishing detector: a new protection against backside attacks 

    Manich Bou, Salvador; Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Mujal Colell, Jordi; Hernández García, David (2015)
    Conference report
    Open Access
    Secure chips are in permanent risk of attacks. Physical attacks usually start removing part of the package and accessing the dice by different means: laser shots, electrical or electromagnetic probes, etc. Doing this ...
  • BIST Architecture to Detect Defects in TSVs During Pre-Bond Testing 

    Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan (Institute of Electrical and Electronics Engineers (IEEE), 2013)
    Conference report
    Restricted access - publisher's policy
    Through Silicon Vias (TSVs) are critical elements in three dimensional integrated circuits (3-D ICs). The detection of defective TSVs in the earliest process step is of major concern. Hence, testing TSVs is usually done ...
  • Caracterització elèctrica de circuits CMOS digitals amb defectes tipus pont: implicacions al test per corrent quiescent 

    Rodríguez Montañés, Rosa (Universitat Politècnica de Catalunya, 1992-12-17)
    Doctoral thesis
    Open Access
    La tesis contribuye a los esfuerzos dirigidos a la consecución de modelaciones precisas de los fallos de tipo puente. La tecnología de los circuitos digitales considerados es la CMOS estática. En la tesis se utiliza un ...
  • CLIL implementation at a Spanish university: A pilot experience 

    Aguilar Pérez, Marta; Rodríguez Montañés, Rosa; Oriol, Carlos (Universidad de Zaragoza, Prensas Universitarias de Zaragoza, 2011)
    Conference lecture
    Restricted access - publisher's policy
  • Crypto-test-lab for security validation of ECC co-processor test infrastructure 

    Lupón Roses, Emilio; Rodríguez Montañés, Rosa; Manich Bou, Salvador (Institute of Electrical and Electronics Engineers (IEEE), 2018)
    Conference report
    Open Access
    Elliptic Curve Cryptography (ECC) is a technology for public-key cryptography that is becoming increasingly popular because it provides greater speed and implementation compactness than other public-key technologies. ...
  • Defective Behaviour of an 8T SRAM Cell with Open Defects 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Manich Bou, Salvador; Figueras Pàmies, Joan; Di Carlo, Stefano; Prinetto, Paolo; Scionti, Alberto (2010)
    Conference report
    Restricted access - publisher's policy
  • Diagnosis of full open defects in interconnecting lines 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Eichenberger, Stefan; Hora, Camelia; Kruseman, Bram; Lousberg, M.; Majhi, A.K. (IEEE, 2007-05-31)
    Conference report
    Open Access
    A proposal for enhancing the diagnosis of full open defects in interconnecting lines of CMOS circuits is presented. The defective line is first classified as fully opened by means of a logic-based diagnosis tool (Faloc). ...
  • Diagnosis of full open defects in interconnect lines with fan-out 

    Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan; Eichenberger, Stefan; Hora, C.; Kruseman, Bram (IEEE Press. Institute of Electrical and Electronics Engineers, 2010-05-24)
    Conference report
    Open Access
    The development of accurate diagnosis methodologies is important to solve process problems and achieve fast yield improvement. As open defects are common in CMOS technologies, accurate diagnosis of open defects becomes ...
  • Gate leakage impact on full open defects in interconnect lines 

    Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan; Eichenberger, Stefan; Hora, Camelia; Kruseman, Bram (2011-06)
    Article
    Open Access
    An Interconnect full open defect breaks the connection between the driver and the gate terminals of downstream transistors, generating a floating line. The behavior of floating lines is known to depend on several factors, ...
  • Impact of gate tunnelling leakage on CMOS circuits with full open defects 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Eichenberger, S.; Hora, Camelia; Kruseman, B. (Institution of Electrical Engineers, 2007-10)
    Article
    Open Access
    Interconnecting lines with full open defects become floating lines. In nanometric CMOS technologies, gate tunnelling leakage currents impact the behaviour of these lines, which cannot be considered electrically isolated ...
  • Integració i avaluació de competències genèriques als Graus de l'ETSEIB 

    Rodríguez Montañés, Rosa (Universitat Politècnica de Catalunya. Institut de Ciències de l'Educació, 2012-02-07)
    Conference lecture / Conference report
    Open Access
  • Lecturer and student perceptions on CLIL at a spanish university 

    Aguilar Pérez, Marta; Rodríguez Montañés, Rosa (Taylor & Francis, 2011)
    Article
    Restricted access - publisher's policy
    This study reports on a pilot implementation of Content and Language Integrated Learning (CLIL) at a Spanish university. In order to find out how both lecturers and students perceived their experience, several interviews ...
  • Localization and electrical characterization of interconnect open defects 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Beverloo, Willem; Vries, Dirk K. de; Eichenberger, Stefan; Volf, Paul A. J. (2010-02)
    Article
    Open Access
    A technique for extracting the electrical and topological parameters of open defects in process monitor lines is presented. The procedure is based on frequency-domain measurements performed at both end points of the ...
  • Post-Bond test of through-silicon vias with open defects 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan (2014)
    Conference report
    Restricted access - publisher's policy
    Through Silicon Vias (TSVs) are critical elements in three dimensional integrated circuits (3-D ICs) and are susceptible to undergo defects at different stages: during their own fabrication, the bonding stage or during ...
  • Postbond test of through-silicon vias with resistive open defects 

    Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan (2019-07-17)
    Article
    Open Access
    Through-silicon vias (TSVs) technology has attracted industry interest as a way to achieve high bandwidth, and short interconnect delays in nanometer three-dimensional integrated circuits (3-D ICs). However, TSVs are ...
  • Power-aware voltage tuning for STT-MRAM reliability 

    Vatajelu, Elena Ioana; Rodríguez Montañés, Rosa; Di Carlo, Stefano; Renovell, Michel; Prinetto, Paolo; Figueras Pàmies, Joan (Institute of Electrical and Electronics Engineers (IEEE), 2015)
    Conference report
    Restricted access - publisher's policy
    One of the most promising emerging memory technologies is the Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM), due to its high speed, high endurance, low area, low power consumption, and good scaling capability. ...
  • Prebond testing of weak defects in TSVs 

    Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan (2015-08-07)
    Article
    Restricted access - publisher's policy
    Through-silicon vias (TSVs) are critical elements in 3-D integrated circuits susceptible to defects during fabrication and lifetime. It is desirable to detect defective TSVs in the early steps of the fabrication process ...