Ara es mostren els items 1-20 de 25

    • An approach to quantifying hardware diversity against common cause failures 

      Alcaide i Portet, Sergi (Universitat Politécnica de Catalunya / Universitat Politècnica de Catalunya, 2018-01-14)
      Projecte Final de Màster Oficial
      Accés obert
      In this thesis, we cover the gapof quantifying diversity by introducing DIMP, a low-cost diversity metric based on analyzing the paths of the circuits and relating it to the particular case of automotive microcontrollers ...
    • An evaluation of energy vs accuracy tradeoffs for object detection accelerators 

      Caro Roca, Martí (Universitat Politècnica de Catalunya, 2022-07-01)
      Projecte Final de Màster Oficial
      Accés restringit per decisió de l'autor
    • Analysis of SoftError Rates for future technologies 

      Riera Villanueva, Marc (Universitat Politècnica de Catalunya, 2015-07)
      Projecte Final de Màster Oficial
      Accés obert
      La fiabilitat s'ha convertit en un aspecte important del disseny de sistemes informàtics a causa de la miniaturització de la tecnologia. En aquest projecte s'analitza la fiabilitat de les tecnologies actuals i futures ...
    • Assessment of a microcontroller for safety-critical avionics and automotive systems 

      Toscano, Lorenzo Giuseppe (Universitat Politècnica de Catalunya, 2018-07)
      Projecte Final de Màster Oficial
      Accés obert
      Realitzat a/amb:   Politecnico di Milano
      Nowadays, microcontrollers used in critical real-time embedded systems use mostly one core, but are being replaced with more powerful hardware platforms that implement multicore systems. Among the latter, it is possible ...
    • Benchmarking vector accelerators with an automotive application 

      Petrovic, Matej (Universitat Politècnica de Catalunya, 2023-06-29)
      Projecte Final de Màster Oficial
      Accés obert
      This project focuses on the development and optimization of an automotive radar application.The project aims to generate a functional version of the application in collaboration with Infineon Germany. The implementation ...
    • Cache designs for reliable hybrid high and ultra-low voltage operation 

      Maric, Bojan (Universitat Politècnica de Catalunya, 2014-05-16)
      Tesi
      Accés obert
      Increasing demand for implementing highly-miniaturized battery-powered ultra-low-cost systems (e.g., below 1 USD) in emerging applications such as body, urban life and environment monitoring, etc., has introduced many ...
    • Design and implementation of a traffic injector for a bus-based space multicore 

      Sala I Sucarrats, Oriol (Universitat Politècnica de Catalunya, 2021-01-26)
      Projecte Final de Màster Oficial
      Accés obert
      Real-time multiprocessor systems have particular needs related to their design, verification, and validation. In particular, they have stringent requirements to prove that they will correctly perform their functionalities, ...
    • Design of a diversity enforcement module for safety critical processing systems 

      Bas Jalón, Francisco (Universitat Politècnica de Catalunya, 2022-07-02)
      Projecte Final de Màster Oficial
      Accés obert
      Safety-critical systems must adhere to specific functional safety standards describing the development process for those systems. One key requirement is the ability to avoid a single fault from causing a system failure, ...
    • Enabling caches in probabilistic timing analysis 

      Kosmidis, Leonidas (Universitat Politècnica de Catalunya, 2017-09-06)
      Tesi
      Accés obert
      Hardware and software complexity of future critical real-time systems challenges the scalability of traditional timing analysis methods. Measurement-Based Probabilistic Timing Analysis (MBPTA) has recently emerged as an ...
    • Enhancing timing analysis for COTS multicores for safety-related industry : a software approach 

      Fernández Díaz, Gabriel Alejandro (Universitat Politècnica de Catalunya, 2018-11-15)
      Tesi
      Accés obert
      Artificial system interaction with the real environment is in general based on the deployment of properly coordinated sensors and actuators, establishing between them a “dynamic control-loop”. The time to close this ...
    • Exploring average-case and probabilistic worst-case performance of time randomised caches and their associated overheads 

      Milutinovic, Suzana (Universitat Politècnica de Catalunya, 2016-01)
      Projecte Final de Màster Oficial
      Accés obert
      In this work we focus on the analysis of performance in the context of Probabilistic Timing Analysis (PTA) from different angles. First, we model and evaluate average performance of time-randomised caches used in the context ...
    • Hardware/software solutions to enable the use of high-performance processors in the most stringent safety-critical systems 

      Alcaide Portet, Sergi (Universitat Politècnica de Catalunya, 2023-07-19)
      Tesi
      Accés obert
      (English) Future Safety-Critical Systems require a boost in guaranteed performance in order to satisfy the increasing performance demands of the state-of-the-art complex software features. Ar1 approach to achieve these ...
    • Improving time predictability of shared hardware resources in real-time multicore systems : emphasis on the space domain 

      Jalle Ibarra, Javier (Universitat Politècnica de Catalunya, 2016-07-18)
      Tesi
      Accés obert
      Critical Real-Time Embedded Systems (CRTES) follow a verification and validation process on the timing and functional correctness. This process includes the timing analysis that provides Worst-Case Execution Time (WCET) ...
    • Increased reliability on Intel GPUs via software diverse redundancy 

      Andriotis, Nikolaos (Universitat Politècnica de Catalunya, 2023-06-26)
      Projecte Final de Màster Oficial
      Accés obert
      In the past decade, Artificial Intelligence has revolutionized various industries, including automotive, avionics, and health sectors. The installation of Advanced Driver Assistance Systems (ADAS) is now a reality, with ...
    • Layout regularity for design and manufacturability 

      Pons Solé, Marc (Universitat Politècnica de Catalunya, 2012-10-02)
      Tesi
      Accés obert
      In nowadays nanometer technology nodes, the semiconductor industry has to deal with the new challenges associated to technology scaling. On one hand, process developers face increasing manufacturing cost and variability, ...
    • Modelling and predicting extreme behavior in critical real-time systems with advanced statistics 

      Vilardell Moreno, Sergi (Universitat Politècnica de Catalunya, 2023-03-13)
      Tesi
      Accés obert
      (English) Critical Real-Time Embedded Systems (CRTES) are used in domains like transportation (e.g. avionics, automotive, space, and railway), healthcare, and industrial machinery. This subset of embedded systems requires ...
    • Modelling Contention in Multicore Hardware Resources during Early Design Stages of Real-Time Systems 

      Trilla Rodríguez, David (Universitat Politècnica de Catalunya, 2016-07)
      Projecte Final de Màster Oficial
      Accés obert
      This thesis presents a modelling approach for the timing behavior of real-time embedded systems in early design phases. The model focuses on multicore processors and it predicts the contention tasks suffer in the access ...
    • Non-functional considerations of time-randomized processor architectures 

      Trilla Rodríguez, David (Universitat Politècnica de Catalunya, 2020-12-04)
      Tesi
      Accés obert
      Critical Real-Time Embedded Systems (CRTES) are the subset of embedded systems with timing constraints whose miss behavior can endanger human lives or expensive equipment. To provide evidence of correctness, CRTES are ...
    • On the analysis of the timing behaviour of time randomised caches 

      Benedicte Illescas, Pedro (Universitat Politècnica de Catalunya, 2016-07-07)
      Projecte Final de Màster Oficial
      Accés obert
      Time Randomised caches (TRc), which can be implemented at hardware level or with software means on conventional deterministic cache designs, have been proposed for real-time systems as key enablers for Probabilistic ...
    • On the Impact of Heterogeneous NoC Bandwidth Allocation in the WCET of Applications 

      Cardona Nadal, Jordi (Universitat Politècnica de Catalunya, 2018-04-16)
      Projecte Final de Màster Oficial
      Accés obert
      Realitzat a/amb:   Barcelona Supercomputing Center / Barcelona Supercomputing Center
      This thesis analyzes the potential of a Flexible Bandwidth Allocation (FBA) method for networks-on-chip (NoCs), which provides heterogeneous bandwidth distribution to improve the worst-case execution time (WCET) of parallel ...