Browsing by Author "Álvarez Mesa, Mauricio"Més informació

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    • A highly scalable parallel implementation of H.264 

      Azevedo, Arnaldo; Juurlink, Ben; Meenderinck, Cor; Terechko, Andrei; Hoogerbrugge, Jan; Álvarez Mesa, Mauricio; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (2011)
      Article
      Open Access
      Developing parallel applications that can harness and efficiently use future many-core architectures is the key challenge for scalable computing systems. We contribute to this challenge by presenting a parallel implementation ...

    • A performance characterization of high definition digital video decoding using H.264/AVC 

      Álvarez Mesa, Mauricio; Salamí San Juan, Esther; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2005)
      Conference report
      Open Access
      H.264/AVC is a new international video coding standard that provides higher coding efficiency with respect to previous standards at the expense of a higher computational complexity. The complexity is even higher when ...

    • HD-VideoBench: A benchmark for evaluating high definition digital video applications 

      Álvarez Mesa, Mauricio; Salamí San Juan, Esther; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2007)
      Conference report
      Open Access
      HD-VideoBench is a benchmark devoted to high definition (HD) digital video processing. It includes a set of video encoders and decoders (Codecs) for the MPEG-2, MPEG-4 and H.264 video standards. The applications were ...

    • Is engagement with a purpose the essence of active learning? 

      Álvarez Mesa, Mauricio (Active Learning for Engineering Education (ALE), 2009)
      Conference report
      Open Access
      In the 2009 edition of the conference on “Active Learning in Engineering Education”, there were several and fruitful discussions within a small workgroup about the essence of active learning. At the end we came with an ...

    • On the scalability of 1- and 2-dimensional SIMD extensions for multimedia applications 

      Sánchez Castaño, Friman; Álvarez Mesa, Mauricio; Salamí San Juan, Esther; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2005)
      Conference report
      Open Access
      SIMD extensions are the most common technique used in current processors for multimedia computing. In order to obtain more performance for emerging applications SIMD extensions need to be scaled. In this paper we perform ...

    • Parallel H.264 decoding on an embedded multicore processor 

      Azevedo, Arnaldo; Meenderinck, Cor; Juurlink, Ben; Terechko, Andrei; Hoogerbrugge, Jan; Álvarez Mesa, Mauricio; Ramírez Bellido, Alejandro (Springer-Verlag, Berlin, Heidelberg,, 2009-01-28)
      Conference report
      Restricted access - publisher's policy
      In previous work the 3D-Wave parallelization strategy was proposed to increase the parallel scalability of H.264 video decoding. This strategy is based on the observation that inter-frame dependencies have a limited spatial ...

    • Parallel scalability of video decoders 

      Meenderinck, Cor; Azevedo, Arnaldo; Juurlink, Ben; Álvarez Mesa, Mauricio; Ramírez Bellido, Alejandro (2009-11)
      Article
      Restricted access - publisher's policy
      An important question is whether emerging and future applications exhibit sufficient parallelism, in particular thread-level parallelism, to exploit the large numbers of cores future chip multiprocessors (CMPs) are ...

    • Parallel video decoding 

      Álvarez Mesa, Mauricio (Universitat Politècnica de Catalunya, 2011-09-08)
      Doctoral thesis
      Open Access
      Digital video is a popular technology used in many different applications. The quality of video, expressed in the spatial and temporal resolution, has been increasing continuously in the last years. In order to reduce the ...

    • Performance evaluation of macroblock-level parallelization of H.264 decoding on a cc-NUMA multiprocessor architecture 

      Álvarez Mesa, Mauricio; Ramírez Bellido, Alejandro; Valero Cortés, Mateo; Azevedo, Arnaldo; Meenderinck, Cor; Juurlink, Ben (2009-04-23)
      Conference report
      Restricted access - publisher's policy
      This paper presents a study of the performance scalability of a macroblock-level parallelization of the H.264 decoder for High De nition (HD) applications on a multiprocessor architecture. We have implemented this ...

    • Performance evaluation of macroblock-level parallelization of H.264 decoding on a cc-NUMA multiprocessor architecture 

      Álvarez Mesa, Mauricio; Ramírez Bellido, Alejandro; Valero Cortés, Mateo; Azevedo, Arnaldo; Meenderinck, Cor; Juurlink, Ben (2009-06)
      Article
      Restricted access - publisher's policy
      Este artículo presenta un estudio de la escalabilidad del rendimiento en el paralelismo a nivel macro bloque de un decodificador H.264 para aplicaciones de alta definición (HD) en arquitecturas de múltiples procesadores. ...

    • Performance impact of unaligned memory operations in SIMD extensions for video CODEC applications 

      Álvarez Mesa, Mauricio; Salamí San Juan, Esther; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2007)
      Conference report
      Open Access
      Although SIMD extensions are a cost effective way to exploit the data level parallelism present in most media applications, we will show that they had have a very limited memory architecture with a weak support for unaligned ...

    • Scalability of Macroblock-level parallelism for H.264 decoding 

      Álvarez Mesa, Mauricio; Ramírez Bellido, Alejandro; Azevedo, Arnaldo; Meenderinck, Cor; Juurlink, Ben; Valero Cortés, Mateo (IEEE Computer Society Publications, 2009-12-11)
      Conference report
      Open Access
      This paper investigates the scalability of MacroBlock(MB) level parallelization of the H.264 decoder for High Definition (HD) applications. The study includes three parts. First, a formal model for predicting the maximum ...

    • Scalability of parallel video decoding on heterogeneous manycore architectures 

      Álvarez Mesa, Mauricio; Cabarcas Jaramillo, Felipe; Ramírez Bellido, Alejandro; Meenderinck, Cor; Juurlink, Ben; Valero Cortés, Mateo (2011)
      Research report
      Open Access
      This paper presents an analysis of the scalability of the parallel video decoding on heterogeneous many core architectures. As benchmark, we use a highly parallel H.264/AVC video decoder that generates a large number of ...

    • The SARC architecture 

      Gaydadjiev, Georgi; Isaza, Sebastian; Ramírez Bellido, Alejandro; Cabarcas, Felipe; Juurlink, Ben; Álvarez Mesa, Mauricio; Sánchez Castaño, Friman; Azevedo, Arnaldo; Meenderinck, Cor; Ciobanu, Catalin (2010-10)
      Article
      Open Access
      The SARC architecture is composed of multiple processor types and a set of user-managed direct memory access (DMA) engines that let the runtime scheduler overlap data transfer and computation. The runtime system automatically ...