Exploració per autor "Haro Ruiz, Juan Miguel de"
Ara es mostren els items 1-6 de 6
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Enabling HW-based task scheduling in large multicore architectures
Morais, Lucas Henrique; Álvarez Martínez, Carlos; Jiménez González, Daniel; Haro Ruiz, Juan Miguel de; Araujo, Guido; Frank, Michael; Goldman, Alfredo; Martorell Bofill, Xavier (Institute of Electrical and Electronics Engineers (IEEE), 2024-01)
Article
Accés obertDynamic Task Scheduling is an enticing programming model aiming to ease the development of parallel programs with intrinsically irregular or data-dependent parallelism. The performance of such solutions relies on the ability ... -
High performance computing PP-distance algorithms to generate X-ray spectra from 3D models
González Griñán, César; Balocco, Simone; Bosch Pons, Jaume; Haro Ruiz, Juan Miguel de; Paolini, Maurizio; Filgueras Izquierdo, Antonio; Álvarez Martínez, Carlos; Pons, Ramon (Multidisciplinary Digital Publishing Institute (MDPI), 2022-09-27)
Article
Accés obertX-ray crystallography is a powerful method that has significantly contributed to our understanding of the biological function of proteins and other molecules. This method relies on the production of crystals that, however, ... -
OmpSs@cloudFPGA: An FPGA task-based programming model with message passing
Haro Ruiz, Juan Miguel de; Cano, Rubén; Álvarez Martínez, Carlos; Jiménez González, Daniel; Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Abel, François; Ringlein, Burkhard; Weiss, Beat (Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés obertNowadays, a new parallel paradigm for energy-efficient heterogeneous hardware infrastructures is required to achieve better performance at a reasonable cost on high-performance computing applications. Under this new paradigm, ... -
OmpSs@FPGA framework for high performance FPGA computing
Haro Ruiz, Juan Miguel de; Bosch Pons, Jaume; Filgueras Izquierdo, Antonio; Vidal, Miquel; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José (Institute of Electrical and Electronics Engineers (IEEE), 2021-12-01)
Article
Accés obertThis paper presents the new features of the OmpSs@FPGA framework. OmpSs is a data-flow programming model that supports task nesting and dependencies to target asynchronous parallelism and heterogeneity. OmpSs@FPGA is the ... -
Towards reconfigurable accelerators in HPC: Designing a multipurpose eFPGA tile for heterogeneous SoCs
Hotfilter, Tim; Kreß, Fabian; Kempf, Fabian; Becker, Jürgen; Haro Ruiz, Juan Miguel de; Jiménez González, Daniel; Moretó Planas, Miquel; Álvarez Martínez, Carlos; Labarta Mancho, Jesús José; Baili, Imen (Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés obertThe goal of modern high performance computing platforms is to combine low power consumption and high throughput. Within the European Processor Initiative (EPI), such an SoC platform to meet the novel exascale requirements ... -
WFAsic: A high-performance ASIC accelerator for DNA sequence alignment on a RISC-V SoC
Haghi, Abbas; Álvarez Martí, Lluc; Fornt Mas, Jordi; Haro Ruiz, Juan Miguel de; Figueras Bagué, Roger; Doblas Font, Max; Marco Sola, Santiago; Moretó Planas, Miquel (Association for Computing Machinery (ACM), 2023)
Text en actes de congrés
Accés obertThe ever-increasing yields in genome sequence data production pose a computational challenge to current genome sequence analysis tools, jeopardizing the future of personalized medicine. Leveraging hardware accelerators ...