Exploració per autor "Peiron Guàrdia, Montse"
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Access to vectors in multi-module memories
Valero Cortés, Mateo; Peiron Guàrdia, Montse; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 1994)
Text en actes de congrés
Accés obertThe poor bandwidth obtained from memory when conflicts arise in the modules or in the interconnection network degrades the performance of computers. Address transformation schemes, such as interleaving, skewing and linear ... -
Conflict-free access for streams in multimodule memories
Valero Cortés, Mateo; Lang Korpel, Thomas; Peiron Guàrdia, Montse; Ayguadé Parra, Eduard (1995-05)
Article
Accés restringit per política de l'editorialAddress transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access for streams with constant stride. However, this is achieved only for some strides. In this ... -
Conflict-free strides for vectors in matched memories
Valero Cortés, Mateo; Lang, Tomas; Llaberia Griñó, José M.; Peiron Guàrdia, Montse; Navarro Guerrero, Juan José; Ayguadé Parra, Eduard (1991-12)
Article
Accés obertAddress transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access to one family of strides in vector processors with matched memories. The paper extends these ... -
Consum responsable
Benbeniste, Sandra; González, Nina; Vera, Mari; Esteban Álvarez, Francisco; Castiella, Txema; Bonil, Josep; Querol, Maya; Olazabal Alberdi, Maria; Balbás, David; González-Gaudiano, Edgar; Peiron Guàrdia, Montse (RCE, 2007-11)
Article
Accés obert[p.4] Es busquen persones conscients -
Increasing the number of strides for conflict-free vector access
Valero Cortés, Mateo; Lang, Tomas; Llaberia Griñó, José M.; Peiron Guàrdia, Montse; Ayguadé Parra, Eduard; Navarro Guerrero, Juan José (1992-05)
Article
Accés obertAddress transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free vector access for some strides in vector processors with multi-module memories. In this paper, we ... -
Synchronized access to streams in multiprocessors
Peiron Guàrdia, Montse; Valero Cortés, Mateo; Ayguadé Parra, Eduard; Lang, Tomás (Institute of Electrical and Electronics Engineers (IEEE), 1993-10)
Article
Accés obertThe synchronized and simultaneous access to several vectors that form a single stream occurs in SIMD vector multiprocessors as well as in MIMD superscalar multiprocessors with decoupled access. In this paper we propose a ...