• 3Cat-1 project: a multi-payload CubeSat for scientific experiments and technology demonstrators 

      Jové Casulleras, Roger; Araguz López, Carles; Via Ortega, Pol; Solanellas Bofarull, Arnau; Amézaga Sarries, Adrià; Vidal Mateu, David; Muñoz Martin, Joan Francesc; Marí Barceló, Marc; Olivé Muñiz, Roger; Sáez Hernández, Alberto; Jané Abad, Jaume; Bou Balust, Elisenda; Iannazzo Soteras, Mario Enrique; Gorreta Mariné, Sergio; Ortega Villasclaras, Pablo Rafael; Pons Nin, Joan; Domínguez Pumar, Manuel; Alarcón Cot, Eduardo José; Ramos Castro, Juan José; Camps Carmona, Adriano José (2017)
      Article
      Accés obert
      This article introduces 3 Cat-1, the first project of the Technical University of Catalonia to build and launch a nano-satellite. Its main scope is to develop, construct, assemble, test and launch into a low Earth orbit a ...
    • 3Cat-1: a multi-payload Cubesat-based scientific and technology demonstrator 

      Jové Casulleras, Roger; Camps Carmona, Adriano José; Ramos Castro, Juan José; Alarcón Cot, Eduardo José; Bou Balust, Elisenda; Carreño Luengo, Hugo; Amézaga Sarries, Adrià; Olivé Muñiz, Roger; Vidal Mateu, David; Muñoz Martin, Joan Francesc; Araguz López, Carles; Marí Barceló, Marc; Ortega Villasclaras, Pablo Rafael; Pons Nin, Joan; Gorreta Mariné, Sergio; Domínguez Pumar, Manuel; Iannazzo Soteras, Mario Enrique (European Spatial Agengy (ESA), 2014)
      Comunicació de congrés
      Accés obert
    • CVD graphene-FET based cascode circuits: a design exploration and fabrication towards intrinsic gain enhancement 

      Iannazzo Soteras, Mario Enrique; Alarcón Cot, Eduardo José; Pandey, Himadri; Passi, V.; Lemme, M. C. (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      This paper presents the design exploration of a basic cascode circuit (CAS) targeted to increase the intrinsic gain A# of a graphene field-effect-transistor (GFET) by decreasing its output conductance go. First, the ...
    • Design exploration and measurement benchmark of integrated-circuits based on graphene field-effect-transistors : towards wireless nanotransceivers 

      Iannazzo Soteras, Mario Enrique (Universitat Politècnica de Catalunya, 2017-09-22)
      Tesi
      Accés obert
      This doctoral thesis approaches the design requirements for future high / ultra-high data rate (from 100 Mbps to 100 Gbps) nanotransceivers (nanoTRx) applied to wireless nanonetworks which imply short/ultra-short distance ...
    • Evaluating the feasibility of wireless Networks-on-Chip enabled by graphene 

      Abadal Cavallé, Sergi; Mestres Sugrañes, Albert; Iannazzo Soteras, Mario Enrique; Solé Pareta, Josep; Alarcón Cot, Eduardo José; Cabellos Aparicio, Alberto (Association for Computing Machinery (ACM), 2014)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Network-on-Chip (NoC) is currently the paradigm of choice for covering the on-chip communication needs of multicore processors. As we reach the manycore era, though, electrical interconnects present performance and power ...
    • On the area and energy scalability of wireless network-on-chip: a model-based benchmarked design space exploration 

      Abadal Cavallé, Sergi; Iannazzo Soteras, Mario Enrique; Nemirovsky, Mario; Cabellos Aparicio, Alberto; Lee, Heekwan; Alarcón Cot, Eduardo José (2014-07-02)
      Article
      Accés obert
      Networks-on-Chip (NoCs) are emerging as the way to interconnect the processing cores and the memory within a chip multiprocessor. As recent years have seen a significant increase in the number of cores per chip, it is ...