Now showing items 1-20 of 25

    • A 3–5-GHz, 385–540-ps CMOS true time delay element for ultra-wideband antenna arrays 

      Aghazadeh Dafsari, Seyed Rasoul; Martínez García, Herminio; Barajas Ojeda, Enrique; Saberkari, Alireza (Elsevier, 2022-05-01)
      Article
      Restricted access - publisher's policy
      This paper proposes an all-pass filter-based true time delay (TTD) element covering a 3–5-GHz ultra-wideband (UWB) frequency. The proposed TTD element designed in a standard 0.18-µm CMOS technology achieves a tunable delay ...
    • A 75 pJ/bit All-Digital Quadrature Coherent IR-UWB Transceiver in 0.18 um CMOS 

      Barajas Ojeda, Enrique; Gómez Salinas, Dídac; Mateo Peña, Diego; González Jiménez, José Luis (2010-05-23)
      Conference report
      Open Access
      In this paper a 75 pJ/b all-digital quadrature coherent impulse radio ultra-wideband transceiver in 0.18 μm CMOS is presented. It consumes 42 mW operating at a 560 Mbps datarate. The receiver and transmitter share most ...
    • A self-calibrating closed loop circuit for configurable constant voltage thermal anemometers 

      Gorreta Mariné, Sergio; Barajas Ojeda, Enrique; Kowalski, Lukasz; Atienza García, María Teresa; Domínguez Pumar, Manuel; Jiménez Serres, Vicente (Institution of Electrical Engineers, 2015-09-17)
      Article
      Open Access
    • A versatile CMOS transistor array IC for the statistical characterization of time-zero variability, RTN, BTI, and HCI 

      Diaz Fortuny, Javier; Martin Martínez, Javier; Rodríguez Martínez, Rosana; Castro López, Rafael; Roca Moreno, Elisenda; Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Mateo Peña, Diego; Fernández Fernández, Francisco V.; Nafría Maqueda, Montserrat (2018-01-01)
      Article
      Open Access
      Statistical characterization of CMOS transistor variability phenomena in modern nanometer technologies is key for accurate end-of-life prediction. This paper presents a novel CMOS transistor array chip to statistically ...
    • Aging compensation in a class-A high-frequency amplifier with DC temperature measurements 

      Altet Sanahujes, Josep; Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Gisbert Beguer, Xavier; Martínez Domingo, Sergio; Mateo Peña, Diego (Multidisciplinary Digital Publishing Institute (MDPI), 2023-08-10)
      Article
      Open Access
      One of the threats to nanometric CMOS analog circuit reliability is circuit performance degradation due to transistor aging. To extend circuit operating life, the bias of the main devices within the circuit must be adjusted ...
    • Aging in CMOS RF linear power amplifiers: an experimental study 

      Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Crespo Yepes, Albert; Mateo Peña, Diego; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat (IEEE Microwave Theory and Techniques Society, 2021-02-01)
      Article
      Open Access
      An extensive experimental analysis of the hot carrier injection (HCI) and bias temperature instability (BTI) aging effects on RF linear power amplifiers (PAs) is presented in this article. Two different 2.45-GHz PA topologies ...
    • Aging in CMOS RF linear power amplifiers: experimental comparison and modeling 

      Aragonès Cervera, Xavier; Mateo Peña, Diego; Barajas Ojeda, Enrique; Crespo-Yepes, A.; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat (Institute of Electrical and Electronics Engineers (IEEE), 2019)
      Conference report
      Restricted access - publisher's policy
      This paper characterizes experimentally the aging degradation experienced by two different 2.45 GHz power amplifier circuits of similar performance, implemented in a 65 nm CMOS technology. Results demonstrate the importance ...
    • Analysis of body bias and RTN-induced frequency shift of low voltage ring oscillators in FDSOI technology 

      Barajas Ojeda, Enrique; Aragonès Cervera, Xavier; Mateo Peña, Diego; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Martin Martínez, Javier; Rodríguez Martínez, Rosana; Porti Pujal, Marc; Nafría Maqueda, Montserrat; Castro López, Rafael; Roca Moreno, Elisenda; Fernandez, Francisco V. (Institute of Electrical and Electronics Engineers (IEEE), 2018)
      Conference report
      Restricted access - publisher's policy
      Electronic circuits powered at ultra low voltages (500 mV and below) are desirable for their low energy and power consumption. However, RTN (Random Telegraph Noise)-induced threshold voltage variations become very significant ...
    • Behavioural modelling of DLLs for fast simulation and optimisation of jitter and power consumption 

      Barajas Ojeda, Enrique; Mateo Peña, Diego; González Jiménez, José Luis (IEEE Computer Society Publications, 2010)
      Conference report
      Open Access
      This paper presents a behavioural model for fast DLL simulations. The behavioural model includes a modelling of the various noise sources in the DLL that produce output jitter. The model is used to obtain the dependence ...
    • BPF-based thermal sensor circuit for on-chip testing of RF circuits 

      Altet Sanahujes, Josep; Barajas Ojeda, Enrique; Mateo Peña, Diego; Billong, Alexandre; Aragonès Cervera, Xavier; Perpiñà Gilabet, Xavier; Reverter Cubarsí, Ferran (Multidisciplinary Digital Publishing Institute (MDPI), 2021-01)
      Article
      Open Access
      A new sensor topology meant to extract figures of merit of radio-frequency analog integrated circuits (RF-ICs) was experimentally validated. Implemented in a standard 0.35 µm complementary metal-oxide-semiconductor (CMOS) ...
    • CMOS inverter performance degradation and its correlation with BTI, HCI and OFF state MOSFETs aging 

      Crespo Yepes, Albert; Nasarre Campo, Carles; Garsot Borras, Norbert; Martin Martínez, Javier; Rodríguez Martínez, Rosana; Barajas Ojeda, Enrique; Aragonès Cervera, Xavier; Mateo Peña, Diego; Nafría Maqueda, Montserrat (2022-05-01)
      Article
      Restricted access - publisher's policy
      In this work, CMOS inverters are subjected to electrical stress emulating a complete operation cycle and the shifts in the performance parameters (i.e., peak current and inversion voltage) evaluated. Moreover, degradation ...
    • Design of a broadband CMOS RF power amplifier to establish device-circuit aging correlations 

      Barajas Ojeda, Enrique; Mateo Peña, Diego; Aragonès Cervera, Xavier; Crespo Yepes, Albert; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat (Institute of Electrical and Electronics Engineers (IEEE), 2017)
      Conference report
      Restricted access - publisher's policy
      This paper presents the design of a Broadband CMOS RF Power Amplifier, suitable to be stressed at circuit level but with the possibility to be measured both at circuit and at device level. It allows establishing a relation ...
    • Differential temperature sensors: Review of applications in the test and characterization of circuits, usage and design methodology 

      Barajas Ojeda, Enrique; Aragonès Cervera, Xavier; Mateo Peña, Diego; Altet Sanahujes, Josep (Multidisciplinary Digital Publishing Institute (MDPI), 2019-11-05)
      Article
      Open Access
      Differential temperature sensors can be placed in integrated circuits to extract a signature ofthe power dissipated by the adjacent circuit blocks built in the same silicon die. This review paper firstdiscusses the singularity ...
    • DLL's behavioral modeling for power consumption and jitter fast optimization 

      Barajas Ojeda, Enrique; Mateo Peña, Diego; González Jiménez, José Luis (2010)
      Conference report
      Open Access
      This paper analyzes the sources of jitter in a DLL and presents a behavioral model for fast DLL optimization. An algorithm to simulate the DLL in open loop is demonstrated. This procedure, together with the behavioral ...
    • Fast time-to-market with via-configurable transistor array regular fabric: A delay-locked loop design case study 

      González Colás, Antonio María; Pons Solé, Marc; Barajas Ojeda, Enrique; Mateo Peña, Diego; López González, Juan Miguel; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier (IEEE Computer Society Publications, 2011)
      Conference lecture
      Restricted access - publisher's policy
      Time-to-market is a critical issue for nowadays integrated circuits manufacturers. In this paper the Via-Configurable Transistor Array regular layout fabric (VCTA), which aims to minimize the time-to-market and its associated ...
    • Impact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches 

      Pouyan, Peyman; Amat Bertran, Esteve; Barajas Ojeda, Enrique; Rubio Sola, Jose Antonio (2014)
      Conference report
      Open Access
      This work presents a test and measurement technique to monitor aging and process variation status of SRAM cells as an aging-aware design technique. We have then verified our technique with an implemented chip. The obtained ...
    • Modeling of the degradation of CMOS inverters under pulsed stress conditions from ‘on-the-fly’ measurements 

      Crespo Yepes, Albert; Ramos Hortal, Regina; Barajas Ojeda, Enrique; Aragonès Cervera, Xavier; Mateo Peña, Diego; Martin Martínez, Javier; Rodríguez Martínez, Rosana; Nafría Maqueda, Montserrat (2021-10-01)
      Article
      Open Access
      In this work, an ‘on-the-fly’ measurement technique for the monitoring of CMOS inverters performance degradation is presented. This technique allows the characterization of the circuit degradation simultaneously with the ...
    • MOSFET degradation dependence on input signal power in a RF power amplifier 

      Crespo Yepes, Albert; Barajas Ojeda, Enrique; Martin Martínez, Javier; Mateo Peña, Diego; Aragonès Cervera, Xavier; Rodríguez Martínez, Rosana; Nafría Maqueda, Montserrat (2017-06-25)
      Article
      Open Access
      Aging produced by RF stress is experimentally analyzed on a RF CMOS power amplifier (PA), as a function of the stress power level. The selected circuit topology allows observing individual NMOS and PMOS transistors ...
    • MOSFET dynamic thermal sensor for IC testing applications 

      Reverter Cubarsí, Ferran; Perpiñà Gilabet, Xavier; Barajas Ojeda, Enrique; León, Javier; Vellvehi, Miquel; Jordà, Xavier; Altet Sanahujes, Josep (2016-05-01)
      Article
      Open Access
      This paper analyses how a single metal-oxide-semiconductor field-effect transistor (MOSFET) can be employed as a thermal sensor to measure on-chip dynamic thermal signals caused by a power-dissipating circuit under test ...
    • Output Power and Gain Monitoring in RF CMOS Class A Power Amplifiers by Thermal Imaging 

      Perpinyà, Xavier; Reverter Cubarsí, Ferran; León, Javier; Barajas Ojeda, Enrique; Vellvehi, Miquel; Jordà, Xavier; Altet Sanahujes, Josep (2018-01-01)
      Article
      Open Access
      The viability of using off-chip single-shot imaging techniques for local thermal testing in integrated Radio Frequency (RF) power amplifiers (PA’s) is analyzed. With this approach, the frequency response of the output power ...