Now showing items 1-10 of 10

    • Enabling a reliable STT-MRAM main memory simulation 

      Asifuzzaman, Kazi; Sánchez-Verdejo, Rommel; Radojković, Petar (Association for Computing Machinery, 2017-10)
      Conference lecture
      Open Access
      STT-MRAM is a promising new memory technology with very desirable set of properties such as non-volatility, byte-addressability and high endurance. It has the potential to become the universal memory that could be incorporated ...
    • Enabling a reliable STT-MRAM main memory simulation 

      Asifuzzaman, Kazi; Sánchez Verdejo, Rommel; Radojković, Petar (Barcelona Supercomputing Center, 2018-04-24)
      Conference report
      Open Access
    • Evaluation of STT-MRAM main memory for HPC and real-time systems 

      Asifuzzaman, Kazi (Universitat Politècnica de Catalunya, 2019-07-29)
      Doctoral thesis
      Open Access
      It is questionable whether DRAM will continue to scale and will meet the needs of next-generation systems. Therefore, significant effort is invested in research and development of novel memory technologies. One of the ...
    • HPC benchmarking: scaling right and looking beyond the average 

      Radulović, Milan; Asifuzzaman, Kazi; Carpenter, Paul Matthew; Radojkovic, Petar; Ayguadé Parra, Eduard (Springer, 2018)
      Conference report
      Open Access
      Designing a balanced HPC system requires an understanding of the dominant performance bottlenecks. There is as yet no well established methodology for a unified evaluation of HPC systems and workloads that quantifies the ...
    • Main memory latency simulation: the missing link 

      Sánchez Verdejo, Rommel; Asifuzzaman, Kazi; Radulović, Milan; Radojkovic, Petar; Ayguadé Parra, Eduard; Jacob, Bruce (Association for Computing Machinery (ACM), 2018)
      Conference report
      Open Access
      The community accepted the need for a detailed simulation of main memory. Currently, the CPU simulators are usually coupled with the cycle-accurate main memory simulators. However, coupling CPU and memory simulators is not ...
    • Mainstream vs. emerging HPC: metrics, trade-offs and lessons learned 

      Radulović, Milan; Asifuzzaman, Kazi; Živanovič, Darko; Rajovic, Nikola; Colin de Verdiére, Guillaume; Pleiter, Dirk; Marazakis, Manolis; Kallimanis, Nikolaos; Carpenter, Paul Matthew; Radojkovic, Petar; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2018)
      Conference report
      Open Access
      Various servers with different characteristics and architectures are hitting the market, and their evaluation and comparison in terms of HPC features is complex and multidimensional. In this paper, we share our experience ...
    • Performance impact of a slower main memory: a case study of STT-MRAM in HPC 

      Asifuzzaman, Kazi; Pavlovic, Milan; Radulović, Milan; Zaragoza, David; Kwon, Ohseong; Ryoo, Kyung-Chang; Radojkovic, Petar (Barcelona Supercomputing Center, 2017-05-04)
      Conference report
      Open Access
      Memory systems are major contributors to the deployment and operational costs of large-scale HPC clusters [1][2][3], as well as one of the most important design parameters that significantly affect system performance. In ...
    • Performance impact of a slower main memory: a case study of STT-MRAM in HPC 

      Asifuzzaman, Kazi; Pavlovic, Milan; Radulović, Milan; Zaragoza, David; Kwon, Ohseong; Ryoo, Kyung-Chang; Radojkovic, Petar (ACM, 2016-10)
      Conference lecture
      Open Access
      In high-performance computing (HPC), significant effort is invested in research and development of novel memory technologies. One of them is Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) --- byte-addressable, ...
    • STT-MRAM for real-time embedded systems: performance and WCET implications 

      Asifuzzaman, Kazi; Fernández, Mikel; Radojkovic, Petar; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier (Association for Computing Machinery (ACM), 2019)
      Conference report
      Open Access
      STT-MRAM is an emerging non-volatile memory quickly approaching DRAM in terms of capacity, frequency and device size. Intensified efforts in STT-MRAM research by the memory manufacturers may indicate a revolution with ...
    • The UP2DATE baseline research platforms 

      Jover Álvarez, Álvaro; Calderón Torres, Alejandro Josué; Rodríguez Ferrández, Iván; Kosmidis, Leonidas; Asifuzzaman, Kazi; Uven, Patrick; Gruttner, Kim; Poggi, Tomaso; Agirre, Irune (IEEE, 2021)
      Conference report
      Open Access
      The UP2DATE H2020 project focuses on highperformance heterogeneous embedded platforms for critical systems. We will develop observability and controllability solutions to support online updates while ensuring safety and ...