Browsing by Author "Asifuzzaman, Kazi"
Now showing items 1-11 of 11
-
Demystifying the Characteristics of High Bandwidth Memory for Real-Time Systems
(Institute of Electrical and Electronics Engineers (IEEE), 2021-12)
Conference report
Open AccessThe number of functionalities controlled by software on every critical real-time product is on the rise in domains like automotive, avionics and space. To implement these advanced functionalities, software applications ... -
Enabling a reliable STT-MRAM main memory simulation
(Association for Computing Machinery, 2017-10)
Conference lecture
Open AccessSTT-MRAM is a promising new memory technology with very desirable set of properties such as non-volatility, byte-addressability and high endurance. It has the potential to become the universal memory that could be incorporated ... -
Enabling a reliable STT-MRAM main memory simulation
(Barcelona Supercomputing Center, 2018-04-24)
Conference report
Open Access -
Evaluation of STT-MRAM main memory for HPC and real-time systems
(Universitat Politècnica de Catalunya, 2019-07-29)
Doctoral thesis
Open AccessIt is questionable whether DRAM will continue to scale and will meet the needs of next-generation systems. Therefore, significant effort is invested in research and development of novel memory technologies. One of the ... -
HPC benchmarking: scaling right and looking beyond the average
(Springer, 2018)
Conference report
Open AccessDesigning a balanced HPC system requires an understanding of the dominant performance bottlenecks. There is as yet no well established methodology for a unified evaluation of HPC systems and workloads that quantifies the ... -
Main memory latency simulation: the missing link
(Association for Computing Machinery (ACM), 2018)
Conference report
Open AccessThe community accepted the need for a detailed simulation of main memory. Currently, the CPU simulators are usually coupled with the cycle-accurate main memory simulators. However, coupling CPU and memory simulators is not ... -
Mainstream vs. emerging HPC: metrics, trade-offs and lessons learned
(Institute of Electrical and Electronics Engineers (IEEE), 2018)
Conference report
Open AccessVarious servers with different characteristics and architectures are hitting the market, and their evaluation and comparison in terms of HPC features is complex and multidimensional. In this paper, we share our experience ... -
Performance impact of a slower main memory: a case study of STT-MRAM in HPC
(ACM, 2016-10)
Conference lecture
Open AccessIn high-performance computing (HPC), significant effort is invested in research and development of novel memory technologies. One of them is Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) --- byte-addressable, ... -
Performance impact of a slower main memory: a case study of STT-MRAM in HPC
(Barcelona Supercomputing Center, 2017-05-04)
Conference report
Open AccessMemory systems are major contributors to the deployment and operational costs of large-scale HPC clusters [1][2][3], as well as one of the most important design parameters that significantly affect system performance. In ... -
STT-MRAM for real-time embedded systems: performance and WCET implications
(Association for Computing Machinery (ACM), 2019)
Conference report
Open AccessSTT-MRAM is an emerging non-volatile memory quickly approaching DRAM in terms of capacity, frequency and device size. Intensified efforts in STT-MRAM research by the memory manufacturers may indicate a revolution with ... -
The UP2DATE baseline research platforms
(IEEE, 2021)
Conference report
Open AccessThe UP2DATE H2020 project focuses on highperformance heterogeneous embedded platforms for critical systems. We will develop observability and controllability solutions to support online updates while ensuring safety and ...
