Browsing by Author "Mauricio Ferré, Juan"
Lithography parametric yield estimation model to predict layout pattern distortions with a reduced set of lithography simulations Gómez Fernández, Sergio; Moll Echeto, Francisco de Borja; Mauricio Ferré, Juan (2014-07-01)
Open AccessA lithography parametric yield estimation model is presented to evaluate the lithography distortion in a printed layout due to lithography hotspots. The aim of the proposed yield model is to provide a new metric that enables ...
Mauricio Ferré, Juan; Moll Echeto, Francisco de Borja (Institute of Electrical and Electronics Engineers (IEEE), 2015)
Restricted access - publisher's policyLocal variations are increasingly important in new technologies. This paper presents the design of adaptive circuits based on the concept of Adaptive Body Bias Islands and a Forward and Reverse Body Bias Generator for FDSOI ...
Mauricio Ferré, Juan; Moll Echeto, Francisco de Borja; Gómez Fernández, Sergio (2014-02-01)
Restricted access - publisher's policyAs technology scales down, IC design is becoming more difficult due to the increase in process variations, which translates into a dispersion of circuit parameter values thus degrading manufacturing yield. Regular layouts ...
Monitor strategies for variability reduction considering correlation between power and timing variability Mauricio Ferré, Juan; Moll Echeto, Francisco de Borja; Altet Sanahujes, Josep (IEEE Press. Institute of Electrical and Electronics Engineers, 2011)
Restricted access - publisher's policyAs CMOS technology scales, Process, Voltage and Temperature (PVT) variations have an increasing impact on, performance and power consumption of the electronic devices. Variability causes an undesirable dispersion of ...