Now showing items 1-12 of 12

    • A hierarchical approach for generating regular floorplans 

      San Pedro Martín, Javier de; Cortadella, Jordi; Roca Pérez, Antoni (Institute of Electrical and Electronics Engineers (IEEE), 2014)
      Conference report
      Open Access
      The complexity of the VLSI physical design flow grows dramatically as the level of integration increases. An effective way to manage this increasing complexity is through the use of regular designs which contain more ...
    • A Simulation framework for hierarchical Network-on-Chip systems 

      San Pedro Martín, Javier de (Universitat Politècnica de Catalunya, 2012-06-22)
      Master thesis
      Open Access
      Today, even the simplest laptop processor has at least four cores and a graphics card containing tens of cores. It is not hard to find more performance- oriented processors with hundreds of cores, and it is expected to ...
    • An environment for the automatic verification of digital circuits 

      San Pedro Martín, Javier de (Universitat Politècnica de Catalunya, 2011-05-17)
      Master thesis (pre-Bologna period)
      Open Access
      English: The aim of this project is to implement a system for the automatic verification of digital circuits written in a high-level hardware description language (Verilog), to be potentially used to assist a electronic ...
    • Architectural exploration of large-scale hierarchical chip multiprocessors 

      Nikitin, Nikita; San Pedro Martín, Javier de; Cortadella, Jordi (2013)
      Article
      Restricted access - publisher's policy
      The continuous scaling of nanoelectronics is increasing the complexity of chip multiprocessors (CMPs) and exacerbating the memory wall problem. As CMPs become more complex, the memory subsystem is organized into more ...
    • Discovering duplicate tasks in transition systems for the simplification of process models 

      San Pedro Martín, Javier de; Cortadella, Jordi (Springer, 2016)
      Conference report
      Open Access
      This work presents a set of methods to improve the understandability of process models. Traditionally, simplification methods trade off quality metrics, such as fitness or precision. Conversely, the methods proposed in ...
    • Jutge.org: characteristics and experiences 

      Petit Silvestre, Jordi; Roura Ferret, Salvador; Carmona Vargas, Josep; Cortadella, Jordi; Duch Brown, Amalia; Giménez, Omer; Mani, Anaga; Mas Rovira, Jan; Rodríguez Carbonell, Enric; Rubio Gimeno, Alberto; San Pedro Martín, Javier de; Venkataramani, Divya (2018-07)
      Article
      Open Access
      Jutge.org is an open educational online programming judge designed for students and instructors, featuring a repository of problems that is well organized by courses, topics and difficulty. Internally, Jutge.org uses a ...
    • Log-based simplification of process models 

      San Pedro Martín, Javier de; Carmona Vargas, Josep; Cortadella, Jordi (Springer, 2015)
      Conference report
      Open Access
      The visualization of models is essential for user-friendly human-machine interactions during Process Mining. A simple graphical representation contributes to give intuitive information about the behavior of a system. ...
    • Mining structured Petri nets for the visualization of process behavior 

      San Pedro Martín, Javier de; Cortadella, Jordi (Association for Computing Machinery (ACM), 2016)
      Conference report
      Open Access
      Visualization is essential for understanding the models obtained by process mining. Clear and efficient visual representations make the embedded information more accessible and analyzable. This work presents a novel approach ...
    • Physical planning for the architectural exploration of large-scale chip multiprocessors 

      San Pedro Martín, Javier de; Nikitin, Nikita; Cortadella, Jordi; Petit Silvestre, Jordi (2013)
      Conference lecture
      Restricted access - publisher's policy
      This paper presents an integrated flow for architectural exploration and physical planning of large-scale hierarchical tiled CMPs. Classical floorplanning and wire planning techniques have been adapted to incorporate layout ...
    • Physical-aware system-level design for tiled hierarchical chip multiprocessors 

      Cortadella, Jordi; San Pedro Martín, Javier de; Nikitin, Nikita; Petit Silvestre, Jordi (ACM Press. Association for Computing Machinery, 2013)
      Conference report
      Open Access
      Tiled hierarchical architectures for Chip Multiprocessors (CMPs) represent a rapid way of building scalable and power-e fficient many-core computing systems. At the early stages of the design of a CMP, physical parameters ...
    • Specification mining for asynchronous controllers 

      San Pedro Martín, Javier de; Bourgeat, Thomas; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Conference report
      Open Access
      The paper presents a first effort at exploring a novel area in the domain of asynchronous controllers: specification mining. Rather than synthesizing circuits from specifications, we aim at doing reverse engineering, i.e., ...
    • Structure discovery techniques for circuit design and process model visualization 

      San Pedro Martín, Javier de (Universitat Politècnica de Catalunya, 2017-10-27)
      Doctoral thesis
      Open Access
      Graphs are one of the most used abstractions in many knowledge fields because of the easy and flexibility by which graphs can represent relationships between objects. The pervasiveness of graphs in many disciplines means ...