Exploració per autor "Nikitin, Nikita"
Ara es mostren els items 1-7 de 7
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Architectural exploration of large-scale hierarchical chip multiprocessors
(2013)
Article
Accés restringit per política de l'editorialThe continuous scaling of nanoelectronics is increasing the complexity of chip multiprocessors (CMPs) and exacerbating the memory wall problem. As CMPs become more complex, the memory subsystem is organized into more ... -
Automatic synthesis and optimization of chip multiprocessors
(Universitat Politècnica de Catalunya, 2013-04-05)
Tesi
Accés obertThe microprocessor technology has experienced an enormous growth during the last decades. Rapid downscale of the CMOS technology has led to higher operating frequencies and performance densities, facing the fundamental ... -
Physical planning for the architectural exploration of large-scale chip multiprocessors
(2013)
Comunicació de congrés
Accés restringit per política de l'editorialThis paper presents an integrated flow for architectural exploration and physical planning of large-scale hierarchical tiled CMPs. Classical floorplanning and wire planning techniques have been adapted to incorporate layout ... -
Physical-aware link allocation and route assignment for chip multiprocessing
(Institute of Electrical and Electronics Engineers (IEEE), 2010)
Text en actes de congrés
Accés obertThe architecture definition, design, and validation of the interconnect networks is a key step in the design of modern on-chip systems. This paper proposes a mathematical formulation of the problem of simultaneously defining ... -
Physical-aware system-level design for tiled hierarchical chip multiprocessors
(ACM Press. Association for Computing Machinery, 2013)
Text en actes de congrés
Accés obertTiled hierarchical architectures for Chip Multiprocessors (CMPs) represent a rapid way of building scalable and power-e fficient many-core computing systems. At the early stages of the design of a CMP, physical parameters ... -
Static task mapping for tiled chip multiprocessors with multiple voltage islands
(2011)
Report de recerca
Accés obertThe complexity of large Chip Multiprocessors (CMP) makes design reuse a practical approach to reduce the manufacturing and design cost of high-performance systems. This paper proposes techniques for static task mapping ... -
Static task mapping for tiled chip multiprocessors with multiple voltage islands
(Springer Verlag, 2012)
Text en actes de congrés
Accés restringit per política de l'editorialThe complexity of large Chip Multiprocessors (CMP) makes design reuse a practical approach to reduce the manufacturing and design cost of high-performance systems. This paper proposes techniques for static task mapping ...
