Exploració per autor "Ortega Fernández, Daniel"
Ara es mostren els items 1-3 de 3
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A content aware integer register file organization
(Institute of Electrical and Electronics Engineers (IEEE), 2004)
Text en actes de congrés
Accés obertA register file is a critical component of a modern superscalar processor. It has a large number of entries and read/write ports in order to enable high levels of instruction parallelism. As a result, the register file's ... -
Cost-effective compiler directed memory prefetching and bypassing
(Institute of Electrical and Electronics Engineers (IEEE), 2002)
Text en actes de congrés
Accés obertEver increasing memory latencies and deeper pipelines push memory farther from the processor. Prefetching techniques aim is to bridge these two gaps by fetching data in advance to both the L1 cache and the register file. ... -
Quantifying the benefits of SPECint distant parallelism in simultaneous multithreading architectures
(Institute of Electrical and Electronics Engineers (IEEE), 1999)
Text en actes de congrés
Accés obertWe exploit the existence of distant parallelism that future compilers could detect and characterise its performance under simultaneous multithreading architectures. By distant parallelism we mean parallelism that cannot ...
