Browsing by Author "Yalcin, Gulay"
Now showing items 1-11 of 11
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A runtime heuristic to selectively replicate tasks for application-specific reliability targets
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Conference report
Open AccessIn this paper we propose a runtime-based selective task replication technique for task-parallel high performance computing applications. Our selective task replication technique is automatic and does not require ... -
Circuit design of a novel adaptable and reliable L1 data cache
(2013)
Conference report
Open AccessThis paper proposes a novel adaptable and reliable L1 data cache design (Adapcache) with the unique capability of automatically adapting itself for different supply voltage levels and providing the highest reliability. ... -
CRC-based memory reliability for task-parallel HPC applications
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Conference report
Restricted access - publisher's policyMemory reliability will be one of the major concerns for future HPC and Exascale systems. This concern is mostly attributed to the expected massive increase in memory capacity and the number of memory devices in Exascale ... -
Designing and modelling selective replication for fault-tolerant HPC applications
(Institute of Electrical and Electronics Engineers (IEEE), 2017)
Conference report
Open AccessFail-stop errors and Silent Data Corruptions (SDCs) are the most common failure modes for High Performance Computing (HPC) applications. There are studies that address fail-stop errors and studies that address SDCs. However ... -
Designs for increasing reliability while reducing energy and increasing lifetime
(Universitat Politècnica de Catalunya, 2014-12-12)
Doctoral thesis
Open AccessIn the last decades, the computing technology experienced tremendous developments. For instance, transistors' feature size shrank to half at every two years as consistently from the first time Moore stated his law. ... -
FaulTM: Error detection and recovery using hardware transactional memory
(2013)
Conference report
Restricted access - publisher's policyReliability is an essential concern for processor designers due to increasing transient and permanent fault rates. Executing instruction streams redundantly in chip multi processors (CMP) provides high reliability since ... -
FaulTM: Fault-tolerance using hardware transactional memory
(2010)
Conference report
Open AccessFault-tolerance has become an essential concern for processor designers due to increasing soft-error rates. In this study, we are motivated by the fact that Transactional Memory (TM) hardware provides an ideal base upon ... -
FIMSIM: A fault injection infrastructure for microarchitectural simulators
(2011)
Research report
Open AccessFault injection is a widely used approach for experiment-based dependability evaluation in which faults can be injected to the hardware, to the simulator or to the software. Simulation based fault injection is more appealing ... -
ParaDIME: Parallel distributed infrastructure for minimization of energy for data centers
(2015-11-01)
Article
Open AccessDramatic environmental and economic impact of the ever increasing power and energy consumption of modern computing devices in data centers is now a critical challenge. On the one hand, designers use technology scaling as ... -
Reliability of GPU-based heterogeneous systems
(Barcelona Supercomputing Center, 2018)
Conference report
Open Access -
System-level power & energy estimation methodology and optimization techniques for CPU-GPU based mobile platforms
(Institute of Electrical and Electronics Engineers (IEEE), 2015)
Conference report
Restricted access - publisher's policyDue to the growing computational requirements of mobile applications, using a heterogeneous Multiprocessor System-on-Chip becomes an incontrovertible solution to meet the service requirements. Today, Electronic System-Level ...
