Exploració per autor "Galcerán Oms, Marc"
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Automatic microarchitectural pipelining
Galcerán Oms, Marc; Cortadella, Jordi; Bufistov, Dmitry; Kishinevsky, Michael (Institute of Electrical and Electronics Engineers (IEEE), 2010)
Text en actes de congrés
Accés obertThis paper presents a method for automatic microarchitectural pipelining of systems with loops. The original specification is pipelined by performing provably-correct transformations including conversion to a synchronous ... -
Correct-by-construction microarchitectural pipelining
Kam, Timothy; Kishinevsky, Michael; Cortadella, Jordi; Galcerán Oms, Marc (Institute of Electrical and Electronics Engineers (IEEE), 2008)
Text en actes de congrés
Accés obertThis paper presents a method for correct-by-construction microarchitectural pipelining that handles cyclic systems with dependencies between iterations. Our method combines previously known bypass and retiming transformations ... -
Elastic Esterel
Galcerán Oms, Marc (Universitat Politècnica de Catalunya, 2007-06-25)
Projecte Final de Màster Oficial
Accés obertThe aim of this master's thesis is to elasticize Esterel. Esterel is an imperative hardware description language (HDL) used to describe reactive systems, and oriented to specify control systems. It belongs to the family ... -
Elastic systems
Cortadella, Jordi; Galcerán Oms, Marc; Kishinevsky, Michael (Institute of Electrical and Electronics Engineers (IEEE), 2010)
Text en actes de congrés
Accés obertElastic systems provide tolerance to the variations in computation and communication delays. The incorporation of elasticity opens new opportunities for optimization using new correct-by-construction transformations that ... -
Multi-level dataflow-driven macro placement guided by RTL structure and analytical methods
Vidal Obiols, Alexandre; Cortadella, Jordi; Petit Silvestre, Jordi; Galcerán Oms, Marc; Martorell Cid, Ferran (2021-12)
Article
Accés obertWhen RTL designers define the hierarchy of a system, they exploit their knowledge about the conceptual abstractions devised during the design and the functional interactions between the logical components. This valuable ... -
Retiming and recycling for elastic systems with early evaluation
Bufistov, Dmitry; Cortadella, Jordi; Galcerán Oms, Marc; Julvez Bueno, Jorge Emilio; Kishinevsky, Mike (2009-04)
Report de recerca
Accés obertRetiming and recycling are two transformations used to optimize the performance of latency-insensitive (a.k.a. synchronous elastic) systems. This paper presents an approach that combines these two transformations for ... -
RTL synthesis: From logic synthesis to automatic pipelining
Cortadella, Jordi; Galcerán Oms, Marc; Kishinevsky, Mike; Sapatnekar, Sachin S. (2015-11-01)
Article
Accés obertDesign automation has been one of the main propellers of the semiconductor industry with logic synthesis being one of the core technologies in this field. This article reviews the evolution of logic synthesis until the ... -
RTL-aware dataflow-driven macro placement
Vidal Obiols, Alexandre; Cortadella, Jordi; Petit Silvestre, Jordi; Galcerán Oms, Marc; Martorell Cid, Ferran (Institute of Electrical and Electronics Engineers (IEEE), 2019)
Text en actes de congrés
Accés obertWhen RTL designers define the hierarchy of a system, they exploit their knowledge about the conceptual abstractions devised during the design and the functional interactions between the logical components. This valuable ... -
Speculation in elastic systems
Galcerán Oms, Marc; Cortadella, Jordi; Kishinevsky, Mike (2009-05)
Report de recerca
Accés obertSpeculation is a well-known technique for increasing parallelism of the microprocessor pipelines and hence their performance. While implementing speculation in modern design practice is error-prone and mostly ad-hoc, this ... -
Symbolic performance analysis of elastic systems
Galcerán Oms, Marc; Cortadella, Jordi; Kishinevsky, Michael (Institute of Electrical and Electronics Engineers (IEEE), 2010)
Text en actes de congrés
Accés obertElastic systems, either synchronous or asynchronous, can be optimized for the average-case performance when they have units with early evaluation or variable latency. The performance evaluation of such systems using ...