Now showing items 1-20 of 49

    • A sampling-based approach for automatic generation of microbenchmarks with a representative memory state 

      Bigas Soldevila, Arnau (Universitat Politècnica de Catalunya, 2021-06-28)
      Bachelor thesis
      Open Access
      A mesura que els processadors han esdevingut més complexos, i així ho ha fet també la tecnologia en què es fabriquen, el temps de simulació del processador físic ha incrementat considerablement. Per reduir el temps de ...
    • Adaptive and application dependant runtime guided hardware reconfiguration for the IBM POWER7 

      Prat Robles, David (Universitat Politècnica de Catalunya, 2014-09-04)
      Master thesis
      Open Access
      The aim of this project is to develop adaptive resource management systems for the im- provement of the power-performance metrics associated with the current and future IBM POWER-series microprocessors.
    • Analysis and evaluation of embedded graphics solutions for critical systems 

      Benito Bermúdez, Marc (Universitat Politècnica de Catalunya, 2019-10-16)
      Bachelor thesis
      Open Access
      Covenantee:   Barcelona Supercomputing Center
      En el camp dels sistemes crítics, que inclou l'automotriu, l'aviònica i els sistemes espacials, es necessita més capacitat de computació per aportar tant valor funcional com seguretat addicional. Per aconseguir-ho, la ...
    • Analyzing European Deep-Learning libraries with Industry Standard Benchmark 

      Beduhe Badouh, Asaf (Universitat Politècnica de Catalunya, 2020-10-28)
      Master thesis
      Open Access
      Covenantee:   Barcelona Supercomputing Center
      For the past decade, machine learning (ML) has revolutionized numerous domains in our daily life. Nowadays, deep learning (DL) algorithms are the central focus of modern ML systems. As a result, we are witnessing an ...
    • Approximate task memoization 

      Brumar, Iulian Valentin (Universitat Politècnica de Catalunya, 2016-10)
      Master thesis
      Restricted access - confidentiality agreement
    • Characterization and modeling of atomic memory operations in arm based architectures 

      Soria Pardos, Victor (Universitat Politècnica de Catalunya, 2022-01-26)
      Master thesis
      Open Access
      Covenantee:   Barcelona Supercomputing Center / Universidad de Zaragoza
      Efficient fine-grain synchronization is a classic computer architecture challenge that has been profusely addressed in the past. Load Link and Store Conditional (LL/SC) became one of the few solutions to this problem and ...
    • Characterization of HPC applications for ARM SIMD instructions 

      Soria Pardos, Victor (Universitat Politècnica de Catalunya, 2019-07)
      Bachelor thesis
      Open Access
      Hoy en día, la mayoría de repertorios de instrucciones (ISA) incluyen instrucciones que procesan multiples datos en una única instruccion. Éstas instrucciones se utilizan para acelerar aplicaciones de alto rendimiento ...
    • Computer Finit-Difference Time-Domain Simulation of Electromagnetic Wave Propagation using GPUs 

      Bonet Manchado, Anna (Universitat Politècnica de Catalunya, 2011-07-21)
      Master thesis (pre-Bologna period)
      Open Access
      English: Design and implementation of an FDTD-based electromagnetic wave propagation simulator to be executed on NVIDIA GPUs systems that also support the CUDA programming model.
    • CPU accounting in multi-threaded processors 

      Ruiz Luque, José Carlos (Universitat Politècnica de Catalunya, 2014-05-29)
      Doctoral thesis
      Open Access
      In recent years, multi-threaded processors have become more and more popular in industry in order to increase the system aggregated performance and per-application performance, overcoming the limitations imposed by the ...
    • CPU model validation for multi-core processor simulation 

      Valle Breix, Elisabet (Universitat Politècnica de Catalunya, 2016-06-30)
      Bachelor thesis
      Open Access
      Designing new architectures is one of the ways to improve the performance of the computers that we used in our days. This improvements allow us to increase productivity, to simulate physics, quimics, etc. that were not ...
    • CPU performance signatures for security attacks detection 

      Baena Sanfeliu, Miquel (Universitat Politècnica de Catalunya, 2018-07-04)
      Bachelor thesis
      Open Access
      A new approach for detecting security attacks on real-time embedded applications by using performance signatures is introduced in the thesis. Assuming that the behavior of real-time embedded applications is ...
    • Defeating barriers for resource usage testing for autonomous driving frameworks 

      Alcón Doganoc, Miguel (Universitat Politècnica de Catalunya, 2020-06)
      Master thesis
      Open Access
      The software used to implement advanced functionalities in critical domains (e.g. autonomous operation) impairs providing evidence that the software has enough resources to correctly execute (e.g. time and memory). This ...
    • Design and implementation of a bootrom in a Linux capable RISC-V processor 

      Garcia Aguilar, Jordi (Universitat Politècnica de Catalunya, 2022-01-26)
      Bachelor thesis
      Restricted access - author's decision
      El moviment de codi obert promet revolucionar el món del maquinari igual que el programari ha revolucionat. Gràcies a l'arquitectura de conjunt d'instruccions o ISA (de l'anglès Instruction Set Architecture) RISC-V de codi ...
    • Design and Implementation of HyperRAM Controller IP 

      Carril Gil, Xavier (Universitat Politècnica de Catalunya, 2020-10-28)
      Bachelor thesis
      Open Access
      Aquesta tesi té com a objectiu dissenyar i implementar un controlador IP HyperRAM per introduir-lo dins d'un System on Chip (SoC) de 65 nanòmetres anomenat DRAC 65nm. L'acrònim DRAC prové del nom del projecte Europeu: ...
    • Design under test interface implementation and stimulus in the verification of a RISC-V vector accelerator 

      Jiménez Arador, Víctor (Universitat Politècnica de Catalunya, 2021)
      Master thesis
      Open Access
      Covenantee:   Barcelona Supercomputing Center
      The production of a microprocessor is one of the most complex and expensive processes in the industry these days. These high costs are why big companies dedicate most of their efforts to design verification during the ...
    • Evaluating the impact of future memory technologies in the design of multicore processors 

      López Paradís, Guillem (Universitat Politècnica de Catalunya, 2017-01)
      Bachelor thesis
      Open Access
      "It’s the Memory, Stupid!" In 1996, Richard Sites, one of the fathers of Computer Architecture and lead designer of the DEC alpha, wrote a paper [36] with the title above. In that paper he realized that the only important ...
    • Evaluation of genome alignment workflows on HPC processors 

      Langarita Benítez, Rubén (Universitat Politècnica de Catalunya, 2021-01-22)
      Master thesis
      Open Access
      Precision medicine holds promise for improving healthcare by leveraging genomic information. Due to the steep decrease in genome sequencing costs in recent years, the amount of data to be processed is increasing dramatically, ...
    • Exploiting data locality in cache-coherent NUMA systems 

      Sánchez Barrera, Isaac (Universitat Politècnica de Catalunya, 2022-04-06)
      Doctoral thesis
      Open Access
      The end of Dennard scaling has caused a stagnation of the clock frequency in computers.To overcome this issue, in the last two decades vendors have been integrating larger numbers of processing elements in the systems, ...
    • Exploiting task-based programming models for resilience 

      Jaulmes, Luc (Universitat Politècnica de Catalunya, 2019-06-21)
      Doctoral thesis
      Open Access
      Hardware errors become more common as silicon technologies shrink and become more vulnerable, especially in memory cells, which are the most exposed to errors. Permanent and intermittent faults are caused by manufacturing ...
    • Exploring Scalability Techniques of OmpSs 

      Brumar, Iulian Valentin (Universitat Politècnica de Catalunya, 2014-06-27)
      Master thesis (pre-Bologna period)
      Restricted access - confidentiality agreement