Browsing by Author "Pavlou, Demos"

Now showing items 1-3 of 3

    • DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support 

      Pavlou, Demos; Gibert Codina, Enric; Latorre, Fernando; González Colás, Antonio María (2012)
      Conference report
      Restricted access - confidentiality agreement
      Dynamic Binary Translators (DBT) and Dynamic Binary Opti- mization (DBO) by software are used widely for several reasons including performance, design simplification and virtualization. However, the software layer in ...

    • HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation 

      Kumar, Rakesh; Cano, José; Brankovic, Aleksandar; Pavlou, Demos; Stavrou, Kyriakos; Gibert Codina, Enric; Martínez, Alejandro; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2017)
      Conference report
      Open Access
      Improving single thread performance is a key challenge in modern microprocessors especially because the traditional approach of increasing clock frequency and deep pipelining cannot be pushed further due to power constraints. ...

    • Quantitative characterization of the software layer of a HW/SW co-designed processor 

      Cano Reyes, José; Kumar, Rakesh; Brankovic, Aleksandar; Pavlou, Demos; Stavrou, Kyriakos; Gibert Codina, Enric; Martínez, Alejandro; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Conference report
      Open Access
      HW/SW co-designed processors currently have a renewed interest due to their capability to boost performance without running into the power and complexity walls. By employing a software layer that performs dynamic binary ...