Browsing by Author "Manich Bou, Salvador"
Now showing items 1-20 of 31
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A calibratable detector for invasive attacks
(2019-01-25)
Article
Restricted access - publisher's policyMicroprobing is commonly used by adversaries to extract firmware or cryptographic keys from microcontrollers. We introduce the calibratable lightweight invasive attack detector (CaLIAD) to detect microprobing attacks. The ... -
A Highly time sensitive XOR gate for probe attempt detectors
(2013-09-05)
Article
Restricted access - publisher's policyProbe attempt detectors are sensors designed to protect buses of secure chips against the physical contact of probes. The operation principle of these detectors relies on the comparison of the delay propagation times ... -
A low area probing detector for power efficient security ICs
(Springer, 2014)
Conference report
Restricted access - publisher's policyIn this paper, a low cost, Low Area Probing Detector (LAPD) is presented. Probing or microprobing is an attack technique against integrated circuits implementing security functions, such as OTP tokens or smartcards. It ... -
A low area probing detector for security IC's
(2014)
Conference report
Restricted access - publisher's policyIn this paper, a low cost, Low Area Probing Detector (LAPD) is presented. Probing or microprobing is an attack technique against integrated circuits implementing security functions, such as OTP tokens or smartcards. It ... -
Anàlisi de l'energia de transició màxima en circuits combinacionals CMOS
(Universitat Politècnica de Catalunya, 1998-11-17)
Doctoral thesis
Open AccessEn la dècada actual, l'augment del consum energètic dels circuits integrats està tenint un impacte cada vegada més important en el disseny electrònic. Segons l'informe de la Semiconductor Industry Association de l'any 1997, ... -
Backside polishing detector: a new protection against backside attacks
(2015)
Conference report
Open AccessSecure chips are in permanent risk of attacks. Physical attacks usually start removing part of the package and accessing the dice by different means: laser shots, electrical or electromagnetic probes, etc. Doing this ... -
Crypto-test-lab for security validation of ECC co-processor test infrastructure
(Institute of Electrical and Electronics Engineers (IEEE), 2018)
Conference report
Open AccessElliptic Curve Cryptography (ECC) is a technology for public-key cryptography that is becoming increasingly popular because it provides greater speed and implementation compactness than other public-key technologies. ... -
Defeating microprobing attacks using a resource efficient detection circuit
(2014)
Conference report
Open AccessMicroprobing is an attack technique against integrated circuits implementing security functions, such as OTP tokens or smartcards. It allows intercepting secrets from onchip wires as well as injecting faults for other ... -
Defeating simple power analysis attacks in cache memories
(Institute of Electrical and Electronics Engineers (IEEE), 2015)
Conference report
Restricted access - publisher's policyA wide range of attacks that target cache memories in secure systems have been reported in the last half decade. Cold-boot attacks can be thwarted through the recently proposed Interleaved Scrambling Technique (IST). ... -
Defective Behaviour of an 8T SRAM Cell with Open Defects
(2010)
Conference report
Restricted access - publisher's policy -
Defending cache memory against cold-boot attacks boosted by power or EM radiation analysis
(2017-04)
Article
Open AccessSome algorithms running with compromised data select cache memory as a type of secure memory where data is confined and not transferred to main memory. However, cold-boot attacks that target cache memories exploit the data ... -
Design and implementation of automatic test equipment IP module
(Institute of Electrical and Electronics Engineers (IEEE), 2010-05-24)
Conference lecture
Restricted access - publisher's policyThis paper presents an Intellectual Property (IP) module that includes fully functional autonomous Automatic Test Equipment (ATE). The module analyses responses from the Device Under Test (DUT) after sending test vectors ... -
Design and validation of a platform for electromagnetic fault injection
(Institute of Electrical and Electronics Engineers (IEEE), 2018)
Conference report
Open AccessSecurity is acknowledged as one of the main challenges in the design and deployment of embedded circuits. Devices need to operate on-the-field safely and correctly, even when at physical reach of potential adversaries. One ... -
Differential scan-path: A novel solution for secure design-for-testability
(2013)
Conference report
Restricted access - publisher's policyIn this paper, we present a new scan-path structure for improving the security of systems including scan paths, which normally introduce a security critical information leak channel into a design. Our structure, named ... -
Enhanced serial RRAM cell for unpredictable bit generation
(2021-05)
Article
Open AccessIn this letter, the serial configuration of two RRAMs is used as a basic cell to generate an unpredictable bit. The basis of the operation considers starting from the Low Resistive State (LRS) in both devices (initialization ... -
Impact of laser attacks on the switching behavior of RRAM devices
(2020-01-20)
Article
Open AccessThe ubiquitous use of critical and private data in electronic format requires reliable and secure embedded systems for IoT devices. In this context, RRAMs (Resistive Random Access Memories) arises as a promising alternative ... -
Improving security in cache memory by power efficient scrambling technique
(2015-04-08)
Article
Restricted access - publisher's policyThe last decade has recorded an increase in security protocols for integrated circuits and memory systems, because of device specific attacks such as side-channel monitoring and cold boot and also because sensitive information ... -
Improving the security of scan path test using differential chains
(2013)
Conference report
Restricted access - publisher's policyIn this paper we present a new scan-path structure for improving the security of systems including a scan path, which normally introduces a security critical information channel into a design. The structure, named differential ... -
Information Leakage Reduction at the Scan-Path Output
(2013)
Conference report
Restricted access - publisher's policyIn this paper we present a new scan-path structure for improving the security of systems including a scan path, which normally introduces a security critical information channel into a design. The structure, named differential ... -
Interleaved Scrambling Technique: A Novel Low-Power Security Layer for Cache Memories
(Institute of Electrical and Electronics Engineers (IEEE), 2014)
Conference lecture
Restricted access - publisher's policyMemory systems security has increased over the last decade due to the sensitive information which is stored in plain text. Device specific attacks, such as cold-boot and sidechannel monitoring have been reported as being ...
