A mixed-signal architecture for high complexity CMOS fuzzy controllers

Abstract

Analog circuits provide better area/power efficiency than their digital counterparts for low-medium precision requirements [1]. This limit in precision, as well as the lack of design tools when compared to the digital approach, imposes a limit of complexity, hence fuzzy analog controllers are usually oriented to fast low-power systems with low-medium complexity. This paper presents a strategy to preserve most of the advantages of an analog implementation, while allowing a notorious increment of the system complexity. Such strategy consists in implementing a reduced number of rules, those that really determine the output in a lattice controller, which we call analog core, then this core is dynamically programmed to perform the computation related to a specific rule set. The data to program the analog core are stored in a memory, and constitutes the whole knowledge base in a kind of virtual rule set. An example 64-rule, 2-input, 4-bit singleton controller has been designed in a CMOS 0.7$\mu$mm technology to demonstrate the viability of the architecture. The measured input-output delay is around 500ns for a power consumption of 16mW and a chip area (without pads) of 2.65mm$^2$.