Ara es mostren els items 70-89 de 326

    • CATA: Criticality aware task acceleration for multicore processors 

      Castillo, Emilio; Moretó Planas, Miquel; Casas, Marc; Álvarez Martí, Lluc; Vallejo, Enrique; Chronaki, Kallia; Badia Sala, Rosa Maria; Bosque Orero, José Luis; Beivide Palacio, Julio Ramón; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2016)
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      Managing criticality in task-based programming models opens a wide range of performance and power optimization opportunities in future manycore systems. Criticality aware task schedulers can benefit from these opportunities ...
    • CellMT: A cooperative multithreading library for the Cell/B.E. 

      Beltran Querol, Vicenç; Carrera Pérez, David; Torres Viñals, Jordi; Ayguadé Parra, Eduard (IEEE Computer Society Publications, 2009-12-16)
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      The Cell BE processor has proved that heterogeneous multi-core systems can provide a huge computational power with high efficiency for a wide range of applications. The simple design of the computational units and the use ...
    • CellSim: a validated modular heterogeneous multiprocessor simulator 

      Cabarcas Jaramillo, Felipe; Rico Carro, Alejandro; Ródenas Picó, David; Martorell Bofill, Xavier; Ramírez Bellido, Alejandro; Ayguadé Parra, Eduard (Thomson Editores Spain, 2007)
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      As the number of transistors on a chip continues increasing the power consumption has become the most important constraint in processors design. Therefore, to increase performance, computer architects have decided to use ...
    • Characterizing and improving the performance of many-core task-based parallel programming runtimes 

      Bosch, Jaume; Tan, Xubin; Álvarez Martínez, Carlos; Jiménez González, Daniel; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (2017)
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      Parallel task-based programming models like OpenMP support the declaration of task data dependences. This information is used to delay the task execution until the task data is available. The dependences between tasks are ...
    • Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures 

      Álvarez Martí, Lluc; Vilanova, Lluís; Moretó Planas, Miquel; Casas, Marc; González Tallada, Marc; Martorell Bofill, Xavier; Navarro, Nacho; Ayguadé Parra, Eduard; Valero Cortés, Mateo (Association for Computing Machinery (ACM), 2015)
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      The increasing number of cores in manycore architectures causes important power and scalability problems in the memory subsystem. One solution is to introduce scratchpad memories alongside the cache hierarchy, forming a ...
    • Combining dynamic concurrency throttling with voltage and frequency scaling on task-based programming models 

      Navarro Muñoz, Antoni; Lorenzon, Arthur F.; Ayguadé Parra, Eduard; Beltran Querol, Vicenç (Association for Computing Machinery (ACM), 2021)
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      Being on the verge of exascale performance has shifted the prioritization of performance in applications to the inclusion of power-performance efficiency as a primary objective in the High Performance Computing (HPC) ...
    • Complete instrumentation requirements for performance analysis of web based technologies 

      Carrera Pérez, David; Guitart Fernández, Jordi; Torres Viñals, Jordi; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José (Institute of Electrical and Electronics Engineers (IEEE), 2003)
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      In this paper we present the eDragon environment, a research platform created to perform complete performance analysis of new Web-based technologies. eDragon enables the understanding of how application servers work in ...
    • Complex pipelined executions in OpenMP parallel applications 

      González Tallada, Marc; Ayguadé Parra, Eduard; Martorell Bofill, Xavier; Labarta Mancho, Jesús José (Institute of Electrical and Electronics Engineers (IEEE), 2001)
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      This paper proposes a set of extensions to the OpenMP programming model to express complex pipelined computations. This is accomplished by defining, in the form of directives, precedence relations among the tasks originated ...
    • Conflict-free access for streams in multimodule memories 

      Valero Cortés, Mateo; Lang Korpel, Thomas; Peiron Guàrdia, Montse; Ayguadé Parra, Eduard (1995-05)
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      Address transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access for streams with constant stride. However, this is achieved only for some strides. In this ...
    • Conflict-free strides for vectors in matched memories 

      Valero Cortés, Mateo; Lang, Tomas; Llaberia Griñó, José M.; Peiron Guàrdia, Montse; Navarro Guerrero, Juan José; Ayguadé Parra, Eduard (1991-12)
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      Address transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access to one family of strides in vector processors with matched memories. The paper extends these ...
    • Cost-aware prediction of uncorrected DRAM errors in the field 

      Boixaderas Coderch, Isaac; Živanovič, Darko; Moré Codina, Sergi; Bartolomé Rodríguez, Javier; Vicente Dorca, David; Casas, Marc; Carpenter, Paul Matthew; Radojković, Petar; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2020)
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      This paper presents and evaluates a method to predict DRAM uncorrected errors, a leading cause of hardware failures in large-scale HPC clusters. The method uses a random forest classifier, which was trained and evaluated ...
    • Cost-aware prediction of uncorrected DRAM errors in the field 

      Boixaderas, Isaac; Carpenter, Paul Matthew; Radojković, Petar; Ayguadé Parra, Eduard (Barcelona Supercomputing Center, 2021-05)
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      One of the main causes of hardware failure in large-scale clusters is an uncorrected error in main memory [1]–[4]. Node failures are especially problematic in high-performance computing (HPC), where a single tightly-coupled ...
    • Cost-conscious strategies to increase performance of numerical programs on agressive VLIW architectures 

      López Álvarez, David; Llosa Espuny, José Francisco; Valero Cortés, Mateo; Ayguadé Parra, Eduard (2001-10)
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      Loops are the main time-consuming part of numerical applications. The performance of the loops is limited either by the resources offered by the architecture or by recurrences in the computation. To execute more operations ...
    • Cost-effective compiler directed memory prefetching and bypassing 

      Ortega Fernández, Daniel; Ayguadé Parra, Eduard; Baer, Jean-Loup; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2002)
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      Ever increasing memory latencies and deeper pipelines push memory farther from the processor. Prefetching techniques aim is to bridge these two gaps by fetching data in advance to both the L1 cache and the register file. ...
    • Criticality-aware dynamic task scheduling for heterogeneous systems 

      Chronaki, Kallia; Rico Carro, Alejandro; Badia Sala, Rosa Maria; Ayguadé Parra, Eduard (Barcelona Supercomputing Center, 2015-05-05)
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    • Crowd simulation and visualization 

      Perez, Hugo; Rudomin, Isaac; Ayguadé Parra, Eduard; Hernandez, Benjamin; Espinosa-Oviedo, Javier A.; Vargas-Solar, Genoveva (Barcelona Supercomputing Center, 2015-05-05)
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      This paper presents a methodology to simulate and visualize crowds. Our goal is to represent the most realistic possible scenarios in a city. Due to the high demand of resources a GPU Cluster is used. We use real data from ...
    • CUDAlign 3.0: Parallel biological sequence comparison in large GPU clusters 

      De Sandes, Edans; Miranda Álamo, Guillermo; De Melo, Alba Cristina Magalhaes Alves; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2014)
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      This paper proposes and evaluates a parallel strategy to execute the e+ xact Smith-Waterman (SW) biological sequence comparison algorithm for huge DNA sequences in multi-GPU platforms. In our strategy, the computation of ...
    • CUDAlign 4.0: incremental speculative traceback for exact chromosome-wide alignment in GPU clusters 

      De Sandes, Edans; Miranda, Guillermo; Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Teodoro, George; de Melo, Alba (2016-10-01)
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      This paper proposes and evaluates CUDAlign 4.0, a parallel strategy to obtain the optimal alignment of huge DNA sequences in multi-GPU platforms, using the exact Smith-Waterman (SW) algorithm. In the first phase of CUDAlign ...
    • DaSH: a benchmark suite for hybrid dataflow and shared memory programming models 

      Gajinov, Vladimir; Stipic, Srdjan; Eric, Igor; Unsal, Osman Sabri; Ayguadé Parra, Eduard; Cristal Kestelman, Adrián (2015-06-01)
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      The current trend in development of parallel programming models is to combine different well established models into a single programming, model in order to support efficient implementation of a wide range of real world ...
    • DaSH: a benchmark suite for hybrid dataflow and shared memory programming models: with comparative evaluation of three hybrid dataflow models 

      Gajinov, Vladimir; Stipic, Srdjan; Eric, Igor; Unsal, Osman Sabri; Ayguadé Parra, Eduard; Cristal Kestelman, Adrián (Association for Computing Machinery (ACM), 2014)
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      The current trend in development of parallel programming models is to combine different well established models into a single programming model in order to support efficient implementation of a wide range of real world ...