Exploració per autor "Ayguadé Parra, Eduard"
Ara es mostren els items 63-82 de 326
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b8c: an FPGA-friendly sparse matrix representation suitable for the SpMV kernel
Oliver, José; Ayguadé Parra, Eduard; Martorell Bofill, Xavier; Álvarez, Carlos (Barcelona Supercomputing Center, 2022-05)
Text en actes de congrés
Accés obertSparse Matrix-Vector multiplication (SpMV), computing y = Ax where y and x are dense vectors and A is a sparse matrix, is a key kernel in many HPC applications. SpMV exhibits a kind of memory access that is extremely hard ... -
Barcelona OpenMP tasks suite: a set of benchmarks targeting the exploitation of task parallelism in OpenMP
Duran González, Alejandro; Teruel, Xavier; Ferrer, Roger; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (2009)
Comunicació de congrés
Accés obert -
Batch job profiling and adaptive profile enforcement for virtualized environments
Becerra Fontal, Yolanda; Carrera Pérez, David; Ayguadé Parra, Eduard (IEEE Computer Society, 2009)
Comunicació de congrés
Accés obertData center management is driven by high-level performance goals, and it is the responsibility of a management middleware to ensure that those goals are met using dynamic resource allocation. The performance delivered by ... -
Breaking master-slave model between host and FPGAs
Bosch Pons, Jaume; Vidal, Miquel; Filgueras Izquierdo, Antonio; Álvarez Martínez, Carlos; Jiménez González, Daniel; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (Association for Computing Machinery (ACM), 2020)
Comunicació de congrés
Accés obertThis paper proposes to enhance current task-based programming models by breaking their current master-slave approach between the main processor and its hardware accelerators. As a proof-of-concept, it presents an extension ... -
BSC contributions in energy-aware resource management for large scale distributed systems
Valero Cortés, Mateo; Torres Viñals, Jordi; Ayguadé Parra, Eduard; Carrera Pérez, David; Guitart Fernández, Jordi; Beltran Querol, Vicenç; Becerra Fontal, Yolanda; Badia Sala, Rosa Maria; Labarta Mancho, Jesús José (2010)
Text en actes de congrés
Accés obertThis paper introduces the work being carried out at Barcelona Supercomputing Center in the area of Green Computing. We have been working in resource management for a long time and recently we included the energy parameter ... -
Buffer sizing for self-timed stream programs on heterogeneous distributed memory multiprocessors
Carpenter, Paul Matthew; Ramírez Bellido, Alejandro; Ayguadé Parra, Eduard (Springer Verlag, 2010)
Text en actes de congrés
Accés restringit per política de l'editorialStream programming is a promising way to expose concurrency to the compiler. A stream program is built from kernels that communicate only via point-to-point streams. The stream compiler statically allocates these kernels ... -
Building graph representations of deep vector embeddings
Garcia Gasulla, Dario; Vilalta Arias, Armand; Parés Pont, Ferran; Moreno Vázquez, Jonatan; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Cortés García, Claudio Ulises; Suzumura, Toyotaro (Association for Computational Linguistics, 2017)
Comunicació de congrés
Accés obertPatterns stored within pre-trained deep neural networks compose large and powerful descriptive languages that can be used for many different purposes. Typically, deep network representations are implemented within vector ... -
CATA: Criticality aware task acceleration for multicore processors
Castillo, Emilio; Moretó Planas, Miquel; Casas, Marc; Álvarez Martí, Lluc; Vallejo, Enrique; Chronaki, Kallia; Badia Sala, Rosa Maria; Bosque Orero, José Luis; Beivide Palacio, Julio Ramón; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés obertManaging criticality in task-based programming models opens a wide range of performance and power optimization opportunities in future manycore systems. Criticality aware task schedulers can benefit from these opportunities ... -
CellMT: A cooperative multithreading library for the Cell/B.E.
Beltran Querol, Vicenç; Carrera Pérez, David; Torres Viñals, Jordi; Ayguadé Parra, Eduard (IEEE Computer Society Publications, 2009-12-16)
Text en actes de congrés
Accés obertThe Cell BE processor has proved that heterogeneous multi-core systems can provide a huge computational power with high efficiency for a wide range of applications. The simple design of the computational units and the use ... -
CellSim: a validated modular heterogeneous multiprocessor simulator
Cabarcas Jaramillo, Felipe; Rico Carro, Alejandro; Ródenas Picó, David; Martorell Bofill, Xavier; Ramírez Bellido, Alejandro; Ayguadé Parra, Eduard (Thomson Editores Spain, 2007)
Text en actes de congrés
Accés obertAs the number of transistors on a chip continues increasing the power consumption has become the most important constraint in processors design. Therefore, to increase performance, computer architects have decided to use ... -
Characterizing and improving the performance of many-core task-based parallel programming runtimes
Bosch, Jaume; Tan, Xubin; Álvarez Martínez, Carlos; Jiménez González, Daniel; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (2017)
Text en actes de congrés
Accés restringit per política de l'editorialParallel task-based programming models like OpenMP support the declaration of task data dependences. This information is used to delay the task execution until the task data is available. The dependences between tasks are ... -
Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures
Álvarez Martí, Lluc; Vilanova, Lluís; Moretó Planas, Miquel; Casas, Marc; González Tallada, Marc; Martorell Bofill, Xavier; Navarro, Nacho; Ayguadé Parra, Eduard; Valero Cortés, Mateo (Association for Computing Machinery (ACM), 2015)
Text en actes de congrés
Accés obertThe increasing number of cores in manycore architectures causes important power and scalability problems in the memory subsystem. One solution is to introduce scratchpad memories alongside the cache hierarchy, forming a ... -
Combining dynamic concurrency throttling with voltage and frequency scaling on task-based programming models
Navarro Muñoz, Antoni; Lorenzon, Arthur F.; Ayguadé Parra, Eduard; Beltran Querol, Vicenç (Association for Computing Machinery (ACM), 2021)
Text en actes de congrés
Accés obertBeing on the verge of exascale performance has shifted the prioritization of performance in applications to the inclusion of power-performance efficiency as a primary objective in the High Performance Computing (HPC) ... -
Complete instrumentation requirements for performance analysis of web based technologies
Carrera Pérez, David; Guitart Fernández, Jordi; Torres Viñals, Jordi; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José (Institute of Electrical and Electronics Engineers (IEEE), 2003)
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Accés obertIn this paper we present the eDragon environment, a research platform created to perform complete performance analysis of new Web-based technologies. eDragon enables the understanding of how application servers work in ... -
Complex pipelined executions in OpenMP parallel applications
González Tallada, Marc; Ayguadé Parra, Eduard; Martorell Bofill, Xavier; Labarta Mancho, Jesús José (Institute of Electrical and Electronics Engineers (IEEE), 2001)
Text en actes de congrés
Accés obertThis paper proposes a set of extensions to the OpenMP programming model to express complex pipelined computations. This is accomplished by defining, in the form of directives, precedence relations among the tasks originated ... -
Conflict-free access for streams in multimodule memories
Valero Cortés, Mateo; Lang Korpel, Thomas; Peiron Guàrdia, Montse; Ayguadé Parra, Eduard (1995-05)
Article
Accés restringit per política de l'editorialAddress transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access for streams with constant stride. However, this is achieved only for some strides. In this ... -
Conflict-free strides for vectors in matched memories
Valero Cortés, Mateo; Lang, Tomas; Llaberia Griñó, José M.; Peiron Guàrdia, Montse; Navarro Guerrero, Juan José; Ayguadé Parra, Eduard (1991-12)
Article
Accés obertAddress transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access to one family of strides in vector processors with matched memories. The paper extends these ... -
Cost-aware prediction of uncorrected DRAM errors in the field
Boixaderas Coderch, Isaac; Živanovič, Darko; Moré Codina, Sergi; Bartolomé Rodríguez, Javier; Vicente Dorca, David; Casas, Marc; Carpenter, Paul Matthew; Radojković, Petar; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2020)
Text en actes de congrés
Accés obertThis paper presents and evaluates a method to predict DRAM uncorrected errors, a leading cause of hardware failures in large-scale HPC clusters. The method uses a random forest classifier, which was trained and evaluated ... -
Cost-aware prediction of uncorrected DRAM errors in the field
Boixaderas, Isaac; Carpenter, Paul Matthew; Radojković, Petar; Ayguadé Parra, Eduard (Barcelona Supercomputing Center, 2021-05)
Text en actes de congrés
Accés obertOne of the main causes of hardware failure in large-scale clusters is an uncorrected error in main memory [1]–[4]. Node failures are especially problematic in high-performance computing (HPC), where a single tightly-coupled ... -
Cost-conscious strategies to increase performance of numerical programs on agressive VLIW architectures
López Álvarez, David; Llosa Espuny, José Francisco; Valero Cortés, Mateo; Ayguadé Parra, Eduard (2001-10)
Article
Accés obertLoops are the main time-consuming part of numerical applications. The performance of the loops is limited either by the resources offered by the architecture or by recurrences in the computation. To execute more operations ...