Resilient random modulo cache memories for probabilistically-analyzable real-time systems
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Cita com:
hdl:2117/99592
Tipus de documentText en actes de congrés
Data publicació2016
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condicions d'accésAccés obert
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ProjecteRYC-2013-14717 (MINECO-RYC-2013-14717)
COMPUTACION DE ALTAS PRESTACIONES VII (MINECO-TIN2015-65316-P)
HiPEAC - High Performance and Embedded Architecture and Compilation (EC-H2020-687698)
COMPUTACION DE ALTAS PRESTACIONES VII (MINECO-TIN2015-65316-P)
HiPEAC - High Performance and Embedded Architecture and Compilation (EC-H2020-687698)
Abstract
Fault tolerance has often been assessed separately in safety-related real-time systems, which may lead to inefficient solutions. Recently, Measurement-Based Probabilistic Timing Analysis (MBPTA) has been proposed to estimate Worst-Case Execution Time (WCET) on high performance hardware. The intrinsic probabilistic nature of MBPTA-commpliant hardware matches perfectly with the random nature of hardware faults.
Joint WCET analysis and reliability assessment has been done so far for some MBPTA-compliant designs, but not for the most promising cache design: random modulo. In this paper we perform, for the first time, an assessment of the aging-robustness of random modulo and propose new implementations preserving the key properties of random modulo, a.k.a. low critical path impact, low miss rates and MBPTA compliance, while enhancing reliability in front of aging by achieving a better – yet random – activity distribution across cache sets.
CitacióTrilla, D., Hernández, C., Abella, J., Cazorla, F. Resilient random modulo cache memories for probabilistically-analyzable real-time systems. A: IEEE International Symposium on On-Line Testing and Robust System Design. "2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS): 4-6 July 2016, Hotel Eden Roc, Sant Feliu de Guixols Catalunya, Spain". Sant Feliu de Guixols, Barcelona: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 27-32.
ISBN978-1-5090-1506-1
Versió de l'editorhttp://ieeexplore.ieee.org/document/7604666/
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Resilient+Random+Modulo+Cache+Memories.pdf | 1,350Mb | Visualitza/Obre |