Enviaments recents

  • On the design of power- and energy-efficient functional units for vector processors 

    Ratković, Ivan (Universitat Politècnica de Catalunya, 2016-12-14)
    Tesi
    Accés obert
    Vector processors are a very promising solution for mobile devices and servers due to their inherently energy-efficient way of exploiting datalevel parallelism. While vector processors succeeded in the high performance ...
  • Improving prefetching mechanisms for tiled CMP platforms 

    Torrents Lapuerta, Martí (Universitat Politècnica de Catalunya, 2016-11-28)
    Tesi
    Accés obert
    Recently, high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures to deal with instruction level parallelism limitations and, more important, to manage the power consumption that is ...
  • Performance-aware energy optimizations in networks for HPC 

    Saravanan, Karthikeyan P. (Universitat Politècnica de Catalunya, 2016-11-02)
    Tesi
    Accés obert
    Energy efficiency is an important challenge in the field of High Performance Computing (HPC). High energy requirements not only limit the potential to realize next-generation machines but are also an increasing part of the ...
  • On the role of performance interference in consolidated environments 

    Rameshan, Navaneeth (Universitat Politècnica de Catalunya, 2016-10-24)
    Tesi
    Accés obert
    Realitzat a/amb:  Kungl. Tekniska högskolan
    With the advent of resource shared environments such as the Cloud, virtualization has become the de facto standard for server consolidation. While consolidation improves utilization, it causes performance-interference ...
  • Improving the efficiency of multicore systems through software and hardware cooperation 

    Jiménez Pérez, Víctor Javier (Universitat Politècnica de Catalunya, 2016-10-20)
    Tesi
    Accés obert
    Increasing processors' clock frequency has traditionally been one of the largest drivers of performance improvements for computing systems. In the first half of the 2000s, however, it became clear that continuing to increase ...
  • Power-constrained aware and latency-aware microarchitectural optimizations in many-core processors 

    Jha, Sudhanshu S. (Universitat Politècnica de Catalunya, 2016-10-05)
    Tesi
    Accés obert
    As the transistor budgets outpace the power envelope (the power-wall issue), new architectural and microarchitectural techniques are needed to improve, or at least maintain, the power efficiency of next-generation processors. ...
  • A multicore emulator with a profiling infrastructure for transactional memory on FPGA 

    Sönmez, Nehir (Universitat Politècnica de Catalunya, 2012-09-19)
    Tesi
    Accés obert
    This thesis attempts to bring together two recent topics by presenting a flexible Transactional Memory environment on a multicore prototype that is realized on FPGA fabric. For this, we devise a MIPS-compatible shared-memory ...
  • Decoupling state from control in software-defined networking 

    Rodríguez Natal, Alberto (Universitat Politècnica de Catalunya, 2016-07-04)
    Tesi
    Accés obert
    Software-Defined Networking (SDN) arose as a solution to address the limitations of traditional networking. In SDN networks, the control-plane is decoupled from the data-plane devices and logically centralized in a new ...
  • Soft error mitigation techniques for future chip multiprocessors 

    Upasani, Gaurang R (Universitat Politècnica de Catalunya, 2016-02-01)
    Tesi
    Accés obert
    The sustained drive to downsize the transistors has reached a point where device sensitivity against transient faults due to neutron and alpha particle strikes a.k.a soft errors has moved to the forefront of concerns for ...
  • The MPI/OmpSs parallel programming model 

    Marjanović, Vladimir (Universitat Politècnica de Catalunya, 2016-01-21)
    Tesi
    Accés obert
    Even today supercomputing systems have already reached millions of cores for a single machine, which are connected by using a complex network interconnection. Reducing communication time across processes becomes the most ...

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