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On-Chip memories, the OS perspective
dc.contributor.author | Villavieja Prados, Carlos |
dc.contributor.author | Gelado Fernandez, Isaac |
dc.contributor.author | Ramírez Bellido, Alejandro |
dc.contributor.author | Navarro, Nacho |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2010-09-28T10:55:06Z |
dc.date.available | 2010-09-28T10:55:06Z |
dc.date.created | 2008-06-04 |
dc.date.issued | 2008-06-04 |
dc.identifier.citation | Villavieja, C. [et al.]. On-Chip memories, the OS perspective. A: HiPEAC Industrial Workshop. "5th HiPEAC Industrial Workshop. Tools and Methodology for Parallel Programming". Barcelona: 2008, p. 1-2. |
dc.identifier.uri | http://hdl.handle.net/2117/9125 |
dc.description.abstract | This paper is a work in progress study of the operating system services required to manage on-chip memories. We are evaluating different CMP on-chip memories configurations. Chip-MultiProcessors (CMP) architectures integrating multiple computing and memory elements presents different problems (coherency, latency, ...) that must be solved. On-chip local memories are directly addressable and their latency is much shorter than off-chip main memories. Since memory latency is a key factor for application performance, we study how the OS can help. |
dc.format.extent | 2 p. |
dc.language.iso | eng |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject.lcsh | Memory management (Computer science) |
dc.subject.other | On-chip memories |
dc.subject.other | Memory architecture |
dc.title | On-Chip memories, the OS perspective |
dc.type | Conference report |
dc.subject.lemac | Gestió de memòria (Informàtica) |
dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.relation.publisherversion | http://www.hipeac.net/industry_workshop5 |
dc.rights.access | Open Access |
local.identifier.drac | 2377723 |
dc.description.version | Postprint (author’s final draft) |
local.citation.author | Villavieja, C.; Gelado, I.; Ramirez, A.; Navarro, N. |
local.citation.contributor | HiPEAC Industrial Workshop |
local.citation.pubplace | Barcelona |
local.citation.publicationName | 5th HiPEAC Industrial Workshop. Tools and Methodology for Parallel Programming |
local.citation.startingPage | 1 |
local.citation.endingPage | 2 |