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dc.contributor.authorBieschewski, Stefan
dc.contributor.authorParcerisa Bundó, Joan Manuel
dc.contributor.authorGonzález Colás, Antonio María
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2016-09-29T08:26:09Z
dc.date.available2016-09-29T08:26:09Z
dc.date.issued2016-08-01
dc.identifier.citationBieschewski, S., Parcerisa, Joan-Manuel, González, A. An energy-efficient memory unit for clustered microarchitectures. "IEEE transactions on computers", 1 Agost 2016, vol. 65, núm. 8, p. 2631-2637.
dc.identifier.issn0018-9340
dc.identifier.urihttp://hdl.handle.net/2117/90303
dc.description.abstractWhereas clustered microarchitectures themselves have been extensively studied, the memory units for these clustered microarchitectures have received relatively little attention. This article discusses some of the inherent challenges of clustered memory units and shows how these can be overcome. Clustered memory pipelines work well with the late allocation of load/store queue entries and physically unordered queues. Yet this approach has characteristic problems such as queue overflows and allocation patterns that lead to deadlocks. We propose techniques to solve each of these problems and show that a distributed memory unit can offer significant energy savings and speedups over a centralized unit. For instance, compared to a centralized cache with a load/store queue of 64/24 entries, our four-cluster distributed memory unit with load/store queues of 16/8 entries each consumes 31 percent less energy and performs 4,7 percent better on SPECint and consumes 36 percent less energy and performs 7 percent better for SPECfp.
dc.format.extent7 p.
dc.language.isoeng
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshCache memory
dc.subject.lcshMicroprocessors
dc.subject.otherCache memories
dc.subject.otherParallel architectures
dc.subject.otherDistributed architectures
dc.subject.otherClustered architectures
dc.subject.otherStore buffer
dc.titleAn energy-efficient memory unit for clustered microarchitectures
dc.typeArticle
dc.subject.lemacMemòria cau
dc.subject.lemacMicroprocessadors
dc.contributor.groupUniversitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors
dc.identifier.doi10.1109/TC.2015.2493518
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/7303897/?arnumber=7303897
dc.rights.accessOpen Access
local.identifier.drac18821393
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO//TIN2013-44375-R/ES/MICROARQUITECTURA Y COMPILADORES PARA FUTUROS PROCESADORES III/
local.citation.authorBieschewski, S.; Parcerisa, Joan-Manuel; González, A.
local.citation.publicationNameIEEE transactions on computers
local.citation.volume65
local.citation.number8
local.citation.startingPage2631
local.citation.endingPage2637


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