PublisherIEEE Press. Institute of Electrical and Electronics Engineers
Rights accessOpen Access
The development of accurate diagnosis
methodologies is important to solve process problems and achieve fast yield improvement. As open defects are common in CMOS
technologies, accurate diagnosis of open defects becomes a key factor. Widely used interconnect full open diagnosis procedures
are based on the assumption that neighbouring lines determine the voltage of the defective line. However, this assumption
decreases the diagnosis efficiency for opens in interconnect lines with fan-out, when the influence of transistor capacitances
becomes important. This work presents a diagnosis methodology for interconnect full open defects where the impact of transistor
parasitic capacitances is included. The methodology is able to properly diagnose interconnect opens with fan-out even in the
presence of Byzantine behaviour. Diagnosis results for real defective devices from different technology nodes are presented.
CitationArumi, D. [et al.]. Diagnosis of full open defects in interconnect lines with fan-out. A: EEE European Test Symposium. "15th European Test Symposium". Praga: IEEE, 2010, p. 233-238.
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