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There is a clear industrial trend towards
chip multiprocessors (CMP) as the most power efficient way of further increasing performance. Heterogeneous CMP architectures take one more step along this power efficiency trend by using multiple types of processors, tailored to the workloads they
will execute. Programming these CMP architectures has been identified as one of the main challenges in the near future, and programming heterogeneous systems is even more challenging. High-level programing
models which allow the programmer to identify parallel tasks, and the runtime management of the intertask dependencies, have been identified as a suitable model for programming such heterogeneous CMP architectures.
In this paper we analyze the performance of Cell
Superscalar, a task-based programming model for the
Cell architecture, in terms of its scalability to higher
number of on-chip processors. Our results show that
the low performance of the PPE component limits the
scalability of some applications to less than 16 processors.
Since the PPE has been identified as the limiting
element, we perform a set of simulation studies evaluating
the impact of out-of-order execution, and larger
caches on the task management overhead.
CitationRico, A.; Ramirez, A.; Valero, M. Task management analysis on the CellBE. A: XIX Jornadas de Paralelismo. "XIX Jornadas de Paralelismo". Castelló: 2008, p. 271-276.
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