Modelling and experimental verification of the impact of negative bias temperature instability on CMOS inverter
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The effects of negative bias temperature instability (NBTI) on the performance of a CMOS inverter have been investigated by means of both simulation and experimental methods. The simulation of NBTI effects on CMOS inverter has been done by shifting the pFET Vtho BSIM parameter. The results show that NBTI shifts the inverter transfer curve, reduces the low noise margin and current consumption but increases the high noise margin. A good agreement between simulation and experimental results has been obtained. Therefore, it can be assumed that the effect of NBTI on CMOS circuits can be mainly predicted by shifting the Vtho pFET parameter.
Published in Microelectronics Reliability, Volume 49, Issues 9-11, September-November 2009, Pages 1048-1051
CitacióBerbel, N.; Fernandez, R.; Gil, I. Modelling and experimental verification of the impact of negative bias temperature instability on CMOS inverter. A: European Symposium on Reliability of Electron Devices, Failure Physics and Analysis. "20th European Symposium on Reliability of Electron Devices, Failure physics and analysis". Arcachon: 2009, p. 1048-1051.