Cerca
Ara es mostren els items 1-10 de 37
MODEST: a model for energy estimation under spatio-temporal variability
(Institute of Electrical and Electronics Engineers (IEEE), 2010)
Text en actes de congrés.
Accés restringit per política de l'editorial
Text en actes de congrés.
Accés restringit per política de l'editorial
Estimation of static and dynamic energy of caches is critical for high-performance low-power designs. Commercial CAD tools performing energy estimation statically are not aware of the changing operating and environmental ...
Statistical characterization and modeling of random telegraph noise effects in 65nm SRAM cells
(Institute of Electrical and Electronics Engineers (IEEE), 2017)
Text en actes de congrés.
Accés restringit per política de l'editorial
Text en actes de congrés.
Accés restringit per política de l'editorial
Random Telegraph Noise (RTN) effects are investigated in 65nm SRAM cells by using a new characterization method that provides
a significant measurement time reduction. The variability induced in commercial SRAM cells is ...
Advanced failure detection techniques in deep submicron CMOS integrated circuits
(Pergamon Press, 2009)
Text en actes de congrés.
Accés restringit per política de l'editorial
Text en actes de congrés.
Accés restringit per política de l'editorial
The test of present integrated circuits exhibits many confining aspects, among them the adequate selection of the observable variables, the use of combined testing approaches, an each time more restricted controllability ...
Analysis of ISSQ/IDDQ testing implementation and circuit partitioning in CMOS cell-based design
(Institute of Electrical and Electronics Engineers (IEEE), 1996)
Text en actes de congrés.
Accés obert
Text en actes de congrés.
Accés obert
Difference between ISSQ and IDDQ testing strategies is presented, discussing the dependency of area overhead and sensing speed on the technology. The current sensor implementation style suitable for cell-based design ...
Effectiveness of hybrid recovery techniques on parametric failures
(Institute of Electrical and Electronics Engineers (IEEE), 2013)
Text en actes de congrés.
Accés restringit per política de l'editorial
Text en actes de congrés.
Accés restringit per política de l'editorial
Modern day microprocessors effectively utilise supply voltage scaling for tremendous power reduction. The minimum voltage beyond which a processor cannot operate reliably is defined as V ddmin. On-chip memories like caches ...
Design guidelines towards compact litho-friendly regular cells
(2011)
Text en actes de congrés.
Accés obert
Text en actes de congrés.
Accés obert
Extending the fundamental error bounds for asymmetric error reliable computation
(IEEE Industrial Electronics Society, 2013)
Text en actes de congrés.
Accés restringit per política de l'editorial
Text en actes de congrés.
Accés restringit per política de l'editorial
Future computing systems based on new emerging nanotechnologies will have to rely on very high failure rate devices. Therefore, the study of fault-tolerant architectures is of great interest today. One of the most challenging ...
Coupled physarum-inspired memristor oscillators for neuron-like operations
(2018)
Text en actes de congrés.
Accés obert
Text en actes de congrés.
Accés obert
Unconventional computing has been studied intensively, even after the appearance of CMOS technology. Currently, it has returned to the spotlight because CMOS is about to reach its physical limits, given that the constant ...
Local variations compensation with DLL-based body bias generator for UTBB FD-SOI technology
(Institute of Electrical and Electronics Engineers (IEEE), 2015)
Text en actes de congrés.
Accés restringit per política de l'editorial
Text en actes de congrés.
Accés restringit per política de l'editorial
Local variations are increasingly important in new technologies. This paper presents the design of adaptive circuits based on the concept of Adaptive Body Bias Islands and a Forward and Reverse Body Bias Generator for FDSOI ...
An on-line test strategy and analysis for a 1T1R crossbar memory
(Institute of Electrical and Electronics Engineers (IEEE), 2017)
Text en actes de congrés.
Accés obert
Text en actes de congrés.
Accés obert
Memristors are emerging devices known by their
nonvolability, compatibility with CMOS processes and high
density in circuits density in circuits mostly owing to the crossbar
nanoarchitecture. One of their most notable ...