Enviaments recents

  • Exploring the voltage divider approach for accurate memristor state tuning 

    Vourkas, Ioannis; Gomez, Jorge; Abusleme, Angel; Vasileiadis, Nikolaos; Sirakoulis, Georgios; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2017)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    The maximum exploitation of the favorable properties and the analog nature of memristor technology in future nonvolatile resistive memories, requires accurate multilevel programming. In this direction, we explore the voltage ...
  • Statistical characterization and modeling of random telegraph noise effects in 65nm SRAM cells 

    Martinez, Javier; Rodriguez, Rosa; Nafria, Montse; Torrents, Gabriel; Bota, Sebastian A .; Segura, Jaume; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2017)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Random Telegraph Noise (RTN) effects are investigated in 65nm SRAM cells by using a new characterization method that provides a significant measurement time reduction. The variability induced in commercial SRAM cells is ...
  • Via-configurable transistors array: a regular design technique to improve ICs yield 

    Pons, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2007)
    Text en actes de congrés
    Accés obert
    Process variations are a major bottleneck for digital CMOS integrated circuits manufacturability and yield. That is why regular techniques with different degrees of regularity are emerging as possible solutions. Our ...
  • Heterogeneous memristive crossbar for in-memory computing 

    Papandroulidakis, Georgios; Vourkas, Ioanis; Sirakoulis, Georgios Ch.; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2015)
    Text en actes de congrés
    Accés obert
    It's been quite a while since scientists are seeking for the ancestor of von Neumann computing architecture. Among the most promising candidates, memristor demonstrates advantageous characteristics, which open new pathways ...
  • Insights to memristive memory cell from a reliability perspective 

    Pouyan, Peyman; Amat Bertran, Esteve; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2015)
    Text en actes de congrés
    Accés obert
    The scaling roadmap of devices under a more than Moore scenario is resulting in the emergence of new types of devices. Among them, memristors seem to be promising candidates to be suitable for various areas of application ...
  • 1-D memristor networks as ternary storage cells 

    Vourkas, Ioannis; Abusleme, Angel; Sirakoulis, Georgios; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Due to its inherent analog nature, the memristor can store information in a continuous form, being thus well-suited for compact multi-bit memory cell technology. In this context, threshold-type switching devices show great ...
  • RRAM variability and its mitigation schemes 

    Pouman, Peyman; Amat, Esteve; Hamdioui, Said; Rubio Sola, Jose Antonio (2016)
    Text en actes de congrés
    Accés obert
    Emerging technologies such as RRAMs are attracting significant attention due to their tempting characteristics such as high scalability, CMOS compatibility and non-volatility to replace the current conventional memories. ...
  • Experience on material implication computing with an electromechanical memristor emulator 

    Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja; Escudero López, Manuel; Zuin, Stefano; Vourkas, Ioannis; Sirakoulis, Georgios (IEEE Press, 2016)
    Text en actes de congrés
    Accés obert
    Memristors are being considered as a promising emerging device able to introduce new paradigms in both data storage and computing. In this paper the authors introduce the concept of a quasi-ideal experimental device that ...
  • ASIC implementation of an all-digital self-adaptive PVTA variation-aware clock generation system 

    Pérez-Puigdemont, Jordi; Moll Echeto, Francisco de Borja (Association for Computing Machinery (ACM), 2016)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    An all-digital self-adaptive clock generation system capable of autonomously adapt the clock frequency to compensate the effects of static spatially heterogeneous (SSHet) PVTA variations is presented. The design uses ...
  • Statistical analysis and comparison of 2T and 3T1D e-DRAM minimum energy operation 

    Rana, Manish; Canal Corretger, Ramon; Amat Bertran, Esteve; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Text en actes de congrés
    Accés obert
    Bio-medical wearable devices restricted to their small-capacity embedded-battery require energy-efficiency of the highest order. However, minimum-energy point (MEP) at sub-threshold voltages is unattainable with SRAM memory, ...

Mostra'n més