Enviaments recents

  • Instruction fetch architectures and code layout optimizations 

    Ramírez Bellido, Alejandro; Larriba Pey, Josep; Valero Cortés, Mateo (2001-11)
    Article
    Accés obert
    The design of higher performance processors has been following two major trends: increasing the pipeline depth to allow faster clock rates, and widening the pipeline to allow parallel execution of more instructions. Designing ...
  • Initial results on fuzzy floating point computation for multimedia processors 

    Álvarez Martínez, Carlos; Corbal San Adrián, Jesús; Salamí San Juan, Esther; Valero Cortés, Mateo (2002-01)
    Article
    Accés obert
    During the recent years, the market of mid/low-end portable systems such as PDAs or mobile digital phones have experimented a revolution in both selling volume and features as handheld devices incorporate Multimedia ...
  • Exploiting instruction-and data-level parallelism 

    Espasa Sans, Roger; Valero Cortés, Mateo (1997-09)
    Article
    Accés obert
    Simultaneous multithreaded vector architectures combine the best of data-level and instruction-level parallelism and perform better than either approach could separately. Our design achieves performance equivalent to ...
  • La fibra óptica, hoy 

    Solé Pareta, Josep (1985-11)
    Article
    Accés obert
    Aplicaciones, ventajas y tipologías de la fibra óptica como una tecnología avanzada en la transmisión de datos.
  • A case for resource-conscious out-of-order processors 

    Cristal Kestelman, Adrián; Martínez, José F; Llosa Espuny, José Francisco; Valero Cortés, Mateo (2003-12)
    Article
    Accés obert
    Modern out-of-order processors tolerate long-latency memory operations by supporting a large number of in-flight instructions. This is achieved in part through proper sizing of critical resources, such as register files ...
  • Software trace cache 

    Ramírez Bellido, Alejandro; Larriba Pey, Josep; Valero Cortés, Mateo (2005-01)
    Article
    Accés obert
    We explore the use of compiler optimizations, which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying hardware resources regardless of the specific details ...
  • Kilo-instruction processors: overcoming the memory wall 

    Cristal Kestelman, Adrián; Santana Jaria, Oliverio J.; Cazorla, Francisco; Galluzzi, Marco; Ramirez Garcia, Tanausú; Pericas, Miquel; Valero Cortés, Mateo (2005-05)
    Article
    Accés obert
    Historically, advances in integrated circuit technology have driven improvements in processor microarchitecture and led to todays microprocessors with sophisticated pipelines operating at very high clock frequencies. ...
  • Statistical analysis and comparison of 2T and 3T1D e-DRAM minimum energy operation 

    Rana, Manish; Canal Corretger, Ramon; Amat Bertran, Esteve; Rubio Sola, Jose Antonio (2017-03-01)
    Article
    Accés obert
    Bio-medical wearable devices restricted to their small-capacity embedded-battery require energy-efficiency of the highest order. However, minimum-energy point (MEP) at sub-threshold voltages is unattainable with SRAM memory, ...
  • Reputation-based joint scheduling of households appliances and storage in a microgrid with a shared battery 

    Alskaif, Tarek; Luna, Adriana C.; Guerrero Zapata, Manel; Guerrero, Josep M.; Bellalta Jimenez, Boris (2017-03-01)
    Article
    Accés restringit per política de l'editorial
    Due to the decreasing revenues from the surplus renewable energy injected into the grid, mechanisms promoting self-consumption of this energy are becoming increasingly important. Demand response (DR) and local storage are ...
  • MInGLE: An efficient framework for domain acceleration using low-power specialized functional units 

    González Álvarez, Cecilia Noemí; Sartor, Jennifer B.; Álvarez Martínez, Carlos; Jiménez González, Daniel; Eeckhout, Lieven (2016-06)
    Article
    Accés obert
    The end of Dennard scaling leads to new research directions that try to cope with the utilization wall in modern chips, such as the design of specialized architectures. Processor customization utilizes transistors more ...

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