Enviaments recents

  • Enhanced DC-Link Capacitor Voltage Balancing Control of DC-AC Multilevel Multileg Converters 

    Busquets Monge, Sergio; Maheshwari, RamKrishan; Nicolás Apruzzese, Joan; Lupón Roses, Emilio; Munk Nielsen, Stig; Bordonau Farrerons, José (Institute of Electrical and Electronics Engineers (IEEE), 2015-05-01)
    Article
    Accés restringit per política de l'editorial
    This paper presents a capacitor voltage balancing control applicable to any multilevel dc-ac converter formed by a single set of series-connected capacitors implementing the dc link and semiconductor devices, such as the ...
  • Improving security in cache memory by power efficient scrambling technique 

    Neagu, Madalin; Miclea, Liviu; Manich Bou, Salvador (2015-04-08)
    Article
    Accés restringit per política de l'editorial
    The last decade has recorded an increase in security protocols for integrated circuits and memory systems, because of device specific attacks such as side-channel monitoring and cold boot and also because sensitive information ...
  • Reliability estimation at block-level granularity of spin-transfer-torque MRAMs 

    Di Carlo, Stefano; Indaco, Marco; Prinetto, Paolo; Vatajelu, Elena Ioana; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Text en actes de congrés
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    In recent years, the Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM) has emerged as a promising choice for embedded memories due to its reduced read/write latency and high CMOS integration capability. Under ...
  • A Method for Detecting Resistive Opens in Buses 

    Rius Vázquez, José (2010)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    The method is based on the modification of bus connectivity to force bus oscillation during testing. The oscillation frequency depends on the open resistance and location on the line. Comparison of the frequency with a ...
  • On the use of error detecting and correcting codes to boost security in caches against side channel attacks 

    Neagu, Madalin; Miclea, Liviu; Manich Bou, Salvador (2015)
    Text en actes de congrés
    Accés obert
    Microprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory remanence is exploited to download its content after the microprocessor has been struck by a hard boot. If just in this moment, a ...
  • Design and implementation of automatic test equipment IP module 

    Fransi Palos, Sergi; Farre Lozano, Goretti; Garcia Deiros, Lucas; Manich Bou, Salvador (Institute of Electrical and Electronics Engineers (IEEE), 2010-05-24)
    Comunicació de congrés
    Accés restringit per política de l'editorial
    This paper presents an Intellectual Property (IP) module that includes fully functional autonomous Automatic Test Equipment (ATE). The module analyses responses from the Device Under Test (DUT) after sending test vectors ...
  • La Promoció 108 compleix 50 anys (1964-2014): història, entorn i records 

    del Cerro, Jordi; Cusí Cusí, Carles; Figueras Pàmies, Joan (Brau, 2014-09-01)
    Llibre
    Accés obert
  • Defeating microprobing attacks using a resource efficient detection circuit 

    Weiner, Michael; Manich Bou, Salvador; Sigl, Georg (2014)
    Text en actes de congrés
    Accés obert
    Microprobing is an attack technique against integrated circuits implementing security functions, such as OTP tokens or smartcards. It allows intercepting secrets from onchip wires as well as injecting faults for other ...
  • Criteria for indirect measurements in M-S testing 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (2014)
    Text en actes de congrés
    Accés restringit per decisió de l'autor
    Analog and mixed-signal circuit testing is a cballenging task demanding large amounts of resources. In order to battle against this drawback, alternate testing has been established as an eflicient way of testing analog ...
  • Real-time transient error and induced noise cancellation in linear analog filters using learning-assisted adaptive analog checksums 

    Gómez Pau, Álvaro; Banerjee, Suvadeep; Chatterjee, Abhijit (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Text en actes de congrés
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    Analog circuits are sensitive to signal aggressions and power supply noise, crosstalk coupling and alpha particle strikes can cause significant degradation of circuit's SNR. This research proposes a novel approach to ...
  • Error resilient real-time state variable systems signal processing and control 

    Banerjee, Suvadeep; Gómez Pau, Álvaro; Chatterjee, Abhijit; Abraham, Jacob (2014)
    Text en actes de congrés
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  • An Efficient behavioral description frontend tool for mixed-mode SPICE simulation 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan; Chatterjee, Abhijit (2014)
    Text en actes de congrés
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