Enviaments recents

  • Computing size-independent matrix problems on systolic array processors 

    Navarro Guerrero, Juan José; Llaberia Griñó, José M.; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 1986)
    Text en actes de congrés
    Accés obert
    A methodology to transform dense to band matrices is presented in this paper. This transformation, is accomplished by triangular blocks partitioning, and allows the implementation of solutions to problems with any given ...
  • Agent-based simulation of large population dynamics 

    Montañola Sales, Cristina; Casanovas Garcia, Josep; Cela Espín, José M.; Onggo, B.S.S.; Kaplan Marcusan, Adriana (2013)
    Comunicació de congrés
    Accés obert
    Agent-based modelling and simulation is a promising methodology that can be used in the study of population dynamics. One of the main obstacles hindering the use of agent-based simulation in practice is its scalability, ...
  • Parallel simulation of large population dynamics 

    Montañola Sales, Cristina; Casanovas Garcia, Josep; Cela Espín, José M.; Kaplan Marcusan, Adriana (2013)
    Comunicació de congrés
    Accés obert
    Agent-based modeling and simulation is a promising methodology that can be used in the study of population dynamics. We present the design and development of a simulation tool which provides basic support for modeling and ...
  • CellSim: a validated modular heterogeneous multiprocessor simulator 

    Cabarcas Jaramillo, Felipe; Rico Carro, Alejandro; Ródenas Picó, David; Martorell Bofill, Xavier; Ramírez Bellido, Alejandro; Ayguadé Parra, Eduard (Thomson Editores Spain, 2007)
    Text en actes de congrés
    Accés obert
    As the number of transistors on a chip continues increasing the power consumption has become the most important constraint in processors design. Therefore, to increase performance, computer architects have decided to use ...
  • Virtual registers 

    González Colás, Antonio María; Valero Cortés, Mateo; González González, José; Monreal Arnal, Teresa (Institute of Electrical and Electronics Engineers (IEEE), 1997)
    Text en actes de congrés
    Accés obert
    The number of physical registers is one of the critical issues of current superscalar out-of-order processors. Conventional architectures allocate, in the decoding stage, a new storage location (e.g. a physical register) ...
  • Distributed training strategies for a computer vision deep learning algorithm on a distributed GPU cluster 

    Campos Camunez, Victor; Sastre, Francesc; Yagües, Maurici; Bellver, Míriam; Giró Nieto, Xavier; Torres Viñals, Jordi (Elsevier, 2017)
    Comunicació de congrés
    Accés obert
    Deep learning algorithms base their success on building high learning capacity models with millions of parameters that are tuned in a data-driven fashion. These models are trained by processing millions of examples, so ...
  • From plasma to beefarm: Design experience of an FPGA-based multicore prototype 

    Sonmez, Nehir; Arcas Abella, Oriol; Sayilar, Gokhan; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Hur, Ibrahim; Singh, Satnam; Valero Cortés, Mateo (Springer, 2011)
    Text en actes de congrés
    Accés obert
    In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obtain the Beefarm infrastructure for FPGA-based multiprocessor emulation, a popular research topic of the last few years ...
  • The Xor embedding: An embedding of hypercubes onto rings and toruses 

    González Colás, Antonio María; Valero García, Miguel (Institute of Electrical and Electronics Engineers (IEEE), 1993)
    Text en actes de congrés
    Accés obert
    Many parallel algorithms use hypercubes as the communication topology among processes, which make them suitable to be executed on a hypercube multicomputer. In this way the communication cost is kept to a minimum since ...
  • Speculative dynamic vectorization 

    Pajuelo González, Manuel Alejandro; González Colás, Antonio María; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2002)
    Text en actes de congrés
    Accés obert
    Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also present in irregular or pointer-rich codes, ...
  • ITCA: Inter-Task Conflict-Aware CPU accounting for CMPs 

    Luque, Carlos; Moreto Planas, Miquel; Cazorla, Francisco; Gioiosa, Roberto; Buyuktosunoglu, Alper; Valero Cortés, Mateo (IEEE Computer Society, 2009)
    Text en actes de congrés
    Accés obert
    Chip-MultiProcessor (CMP) architectures are becoming more and more popular as an alternative to the traditional processors that only extract instruction-level parallelism from an application. CMPs introduce complexities ...

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