Enviaments recents

  • A performance analysis of a mimetic finite difference scheme for acoustic wave propagation on GPU platforms 

    Otero Calviño, Beatriz; Frances, Jorge; Rodriguez Cruz, Robert; Rojas, Otilio; Solano, Freysimar; Guevara-Jordan, Juan (2017-02-01)
    Article
    Accés restringit per política de l'editorial
    Realistic applications of numerical modeling of acoustic wave dynamics usually demand high-performance computing because of the large size of study domains and demanding accuracy requirements on simulation results. Forward ...
  • Reducing branch delay to zero in pipelined processors 

    González Colás, Antonio María; Llaberia Griñó, José M. (1993-03)
    Article
    Accés obert
    A mechanism to reduce the cost of branches in pipelined processors is described and evaluated. It is based on the use of multiple prefetch, early computation of the target address, delayed branch, and parallel execution ...
  • Adaptive runtime-assisted block prefetching on chip-multiprocessors 

    García Flores, Víctor; Rico Carro, Alejandro; Villavieja Prados, Carlos; Carpenter, Paul M.; Navarro Mas, Nacho; Ramirez, Alex (2016-04-29)
    Article
    Accés restringit per política de l'editorial
    Memory stalls are a significant source of performance degradation in modern processors. Data prefetching is a widely adopted and well studied technique used to alleviate this problem. Prefetching can be performed by the ...
  • Improving I/O performance through an in-kernel disk simulator 

    González Férez, Pilar; Piernas Canovas, Juan; Cortés, Toni (2016-10-01)
    Article
    Accés restringit per política de l'editorial
    This paper presents two mechanisms that can significantly improve the I/O performance of both hard and solid-state drives for read operations: KDSim and REDCAP. KDSim is an in-kernel disk simulator that provides a framework ...
  • Emergent behaviors in the Internet of things: The ultimate ultra-large-scale system 

    Roca, Damian; Nemirovsky, Daniel; Nemirovsky, Mario; Milito, Rodolfo; Valero Cortés, Mateo (2016-11)
    Article
    Accés obert
    To reach its potential, the Internet of Things (IoT) must break down the silos that limit applications' interoperability and hinder their manageability. Doing so leads to the building of ultra-large-scale systems (ULSS) ...
  • Fitting processor architectures for measurement-based probabilistic timing analysis 

    Kosmidis, Leonidas; Quiñones Moreno, Eduardo; Abella Ferrer, Jaume; Vardanega, Tullio; Hernández, Carles; Gianarro, Andrea; Broster, Ian; Cazorla Almeida, Francisco Javier (2016-11-01)
    Article
    Accés restringit per política de l'editorial
    The pressing market demand for competitive performance/cost ratios compels Critical Real-Time Embedded Systems industry to employ feature-rich hardware. The ensuing rise in hardware complexity however makes worst-case ...
  • Modeling multi-board communication in the AXIOM cyber-physical system 

    Giorgi, Roberto; Mazumdar, Somnath; Viola, Stefano; Gai, Paolo; Garzarella, Stefano; Morelli, Bruno; Pnevmatikatos, Dionisis; Theodoropoulos, Dimitris; Alvarez, Carlos; Ayguadé Parra, Eduard; Bueno, Javier; Filgueras Izquierdo, Antonio; Jiménez-González, Daniel; Martorell Bofill, Xavier (2016-12-01)
    Article
    Accés restringit per política de l'editorial
    The main goal of the AXIOM project is to design a small board that could be used as a LEGOTM-style module to build systems with more performance while keeping the programming task simple by using a familiar shared-memory ...
  • A visual embedding for the unsupervised extraction of abstract semantics 

    García Gasulla, Dario; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Béjar Alonso, Javier; Cortés García, Claudio Ulises; Suzumura, Toyotaro; Chen, R (2017-05-01)
    Article
    Accés restringit per política de l'editorial
    Vector-space word representations obtained from neural network models have been shown to enable semantic operations based on vector arithmetic. In this paper, we explore the existence of similar information on vector ...
  • Un modelo para diseñar actividades de aprendizaje en la enseñanza de ingenierías 

    Otero Calviño, Beatriz; Rodríguez Luna, Eva (Red Estatal de Docencia Universitaria, 2016-11-01)
    Article
    Accés obert
    En los actuales momentos nuestros estudiantes se encuentran bastante desmotivados a la hora de asistir a clase y de trabajar. Esto conduce a que sea necesario que el profesor introduzca cambios en sus clases que lo lleven ...
  • Modulo scheduling with reduced register pressure 

    Llosa Espuny, José Francisco; Valero Cortés, Mateo; Ayguadé Parra, Eduard; González Colás, Antonio María (1998-06)
    Article
    Accés obert
    Software pipelining is a scheduling technique that is used by some product compilers in order to expose more instruction level parallelism out of innermost loops. Module scheduling refers to a class of algorithms for ...

Mostra'n més