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A co-designed HW/SW approach to general purpose program acceleration using a programmable functional unit
(IEEE Press. Institute of Electrical and Electronics Engineers, 2011)
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In this paper, we propose a novel programmable functional unit (PFU) to accelerate general purpose application execution on a modern out-of-order x86 processor in a complexity-effective way. Code is transformed and ...
Design of complex circuits using the via-configurable transistor array regular layout fabric
(IEEE Computer Society Publications, 2011)
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Layout regularity will be mandatory for future CMOS technologies to mitigate manufacturability issues. However, existing CAD tools do not meet the needs imposed by regularity constraints. In this paper we present a new ...
Global productiveness propagation: A code optimization technique to speculatively prune useless narrow computations
(ACM Press, NY, 2011)
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This paper proposes a unique hardware-software collaborative strategy to remove useless work at 16-bit data-width granularity. The underlying motivation is to design a low power execution platform by exploiting ‘narrow’ ...
Fg-STP: fine-grain single thread partitioning on multicores
(IEEE Press. Institute of Electrical and Electronics Engineers, 2011)
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Power and complexity issues have led the microprocessor industry to shift to Chip Multiprocessors in order to be able to better utilize the additional transistors ensured by Moore's law. While parallel programs are going ...
A take-home exam to assess professional skills
(IEEE, 2011)
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Professional Skills, such as the ability to communicate effectively or the ability to gather and integrate information, are not easy to teach or to assess. A traditional exam is not the best way of assessing these skills ...
Fast time-to-market with via-configurable transistor array regular fabric: A delay-locked loop design case study
(IEEE Computer Society Publications, 2011)
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Time-to-market is a critical issue for nowadays integrated circuits manufacturers. In this paper the Via-Configurable Transistor Array regular layout fabric (VCTA), which aims to minimize the time-to-market and its associated ...
Hardware/software-based diagnosis of load-store queues using expandable activity logs
(IEEE Press. Institute of Electrical and Electronics Engineers, 2011)
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The increasing device count and design complexity are posing significant challenges to post-silicon validation. Bug diagnosis is the most difficult step during post-silicon validation. Limited reproducibility and low testing ...
From plasma to beefarm: Design experience of an FPGA-based multicore prototype
(Springer, 2011)
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In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obtain the Beefarm infrastructure for FPGA-based multiprocessor emulation, a popular research topic of the last few years ...
Impact of positive bias temperature instability (PBTI)
(2011)
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Memory circuits are playing a key role in complex multicore systems with both data and instructions storage and mailbox communication functions. There is a general concern that conventional SRAM cell based on the 6T structure ...