Recent Submissions

  • Control-flow speculation through value prediction 

    González, José; González Colás, Antonio María (2001-12)
    Article
    Restricted access - publisher's policy
    In this paper, we introduce a new branch predictor that predicts the outcome of branches by predicting the value of their inputs and performing an early computation of their results according to the predicted values. The ...
  • Network aware performance evaluation of prefetching techniques in CMPs 

    Torrents Lapuerta, Martí; Martinez Morais, Raul; Molina Clemente, Carlos (2014-06-01)
    Article
    Restricted access - publisher's policy
    This study focuses on the importance of quantifying the effect of prefetching on the interconnection network of a multiprocessor chip. This kind of microarchitectural effects are often quantified using simulators. However, ...
  • Impact of finfet and III-V/Ge technology on logic and memory cell behavior 

    Amat Bertran, Esteve; Calomarde Palomino, Antonio; García Almudéver, Carmen; Aymerich Capdevila, Nivard; Canal Corretger, Ramon; Rubio Sola, Jose Antonio (2013-11-20)
    Article
    Restricted access - publisher's policy
    In this work, we assess the performance of a ring oscillator and a DRAM cell when they are implemented with different technologies (planar CMOS, FinFET and III-V MOSFETs), and subjected to different reliability scenarios ...
  • Comparison of SRAM cells for 10-nm SOI FinFETs under process and environmental variations 

    Jaksic, Zoran; Canal Corretger, Ramon (2012-12)
    Article
    Restricted access - publisher's policy
    We explore the 6T and 8T SRAM design spaces through read static noise margin (RSNM), word-line write margin, and leakage for future 10-nm FinFETs. Process variations are based on the ITRS and modeled at device (TCAD) level. ...
  • Exámenes no presenciales 

    López Álvarez, David; Sánchez Carracedo, Fermín; Cruz Díaz, Josep Llorenç; Fernández Jiménez, Agustín (2012-12)
    Article
    Open Access
    Los exámenes tradicionales están orientados a la evaluación sumativa, no a la formativa. Su objetivo es evaluar, no facilitar el aprendizaje, y debido a ello provocan un aprendizaje superficial más que un aprendizaje ...
  • The contribution of Type IA supernovae to the galactic iron abundances 

    Bravo Guil, Eduardo; Isern Vilaboy, Jordi; Canal Corretger, Ramon (1993-03)
    Article
    Open Access
    The thermonuclear explosion of a mass-accreting white dwarf in a close binary system is thought to be at the origin of Type Ia supernovae. Standard models, which ignite carbon at densities higher than 2-4 x 10 exp 9 g/cu ...
  • On the photometric homogeneity of type IA supernovae 

    Bravo Guil, Eduardo; Domínguez, Inmaculada; Isern Vilaboy, Jordi; Canal Corretger, Ramon; Höflich, P.; Labay, Javier (1993-03)
    Article
    Open Access
    The dependence of the characteristics of the light curves of Type Ia supernovae on the ignition density of the progenitor white dwarf is studied with the aid of two models of propagation of the thermonuclear burning front: ...
  • The migration prefetcher: anticipating data promotion in dynamic NUCA caches 

    Lira Rueda, Javier; Jones, Timothy M.; Molina, Carlos; González Colás, Antonio María (2012-01)
    Article
    Open Access
  • Implementing end-to-end register data-flow continuous self-test 

    Carretero Casado, Javier Sebastián; Chaparro, Pedro; Vera Rivera, Francisco Javier; Abella Ferrer, Jaume; González Colás, Antonio María (2011-08-01)
    Article
    Restricted access - publisher's policy
    While Moore's Law predicts the ability of semiconductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in that law. One concern is the verification effort ...
  • TRAMS Project: variability and reliability of SRAM memories in sub-22nm bulk-CMOS technologies 

    Canal Corretger, Ramon; Rubio Sola, Jose Antonio; ASenov, Asen; Brown, Andrew; Miranda, Miguel; Zuber, Paul; González Colás, Antonio María; Vera, Xavier (Elsevier, 2011-12-22)
    Article
    Restricted access - publisher's policy
    The TRAMS (Terascale Reliable Adaptive MEMORY Systems) project addresses in an evolutionary way the ultimate CMOS scaling technologies and paves the way for revolutionary, most promising beyond-CMOS technologies. In this ...

View more