La principal finalitat del grup és investigar en el camp del disseny arquitectònic dels futurs processadores tenint en compte especialment els nous aspectes tecnològics que el condicionaran, tant per processadors d'alt rendiment com pels destinats a l'electrònica de consum.

El grup continua estant format per la mateixa base de professors doctors que ja vam obtenir l'ajut en les convocatòries SGR tant l'any 2005 com el 2009. Està format per professors del Dpt. d'Arquitectura de Computadors de la UPC juntament amb dos professors de la URV. A aquesta base s'hi ha afegit respecte la darrera convocatòria 4 nous membres doctors amb contracte post-doctoral. La variabilitat cal buscar-la en els membre pre-doctors, on es donen de baixa aquells que ja han acabat la tesi i es donen d'alta els nous estudiants de doctorat.

Volem destacar que el grup ha produït al voltant de 500 articles en congressos i revistes d'alt impacte, més de 100 patents i ha dirigit mes de 25 tesis.

http://futur.upc.edu/ARCO

The mission of the group is to conduct research in the areas of microarchitecture and compilers for future microprocessors. The aim is to increase processors' performance, reduce their energy consumption, improve the effectiveness of heat dissipation, increase their reliability and reduce their complexity.

http://futur.upc.edu/ARCO

Recent Submissions

  • PARSAR: A SAR processor implemented in a cluster of workstations 

    Maretínez, A; Fraile, F; Mallorquí Franquet, Jordi Joan; Nogueira, L; Gabaldà, J; Broquetas Ibars, Antoni; González Colás, Antonio María (ESA Publications Division, 1997)
    Conference report
    Open Access
    A parallel SAR processor is presented in this paper. The target configuration is a cluster of UNIX workstations, available in most user sites. This fact allows to obtain an increased computing performance without the need ...
  • PARSAR: Parallelisation of a chirp scaling algorithm SAR processor 

    MARTINEZ, A; Fraile, F; Mallorquí Franquet, Jordi Joan; Nogueira, J; Gavalda, J; Broquetas Ibars, Antoni; González Colás, Antonio María (Ch. Lengauer, M. Grielb, S. Gorlatch. BERLIN, NEW YORK, Springer-Verlag Cop.1997, 1997)
    Conference report
    Open Access
    A parallel SAR processor is presented in this paper. The target configuration is a cluster of UNIX workstations, available in most user sites. This fact allows to obtain an increased computing performance without the need ...
  • A case for acoustic wave detectors for soft-errors 

    Upasani, Gaurang; Vera, Xavier; González Colás, Antonio María (2016-01-01)
    Article
    Restricted access - publisher's policy
    The continuing decrease in dimensions and operating voltage of transistors has increased their sensitivity against radiation phenomena, making soft errors an important challenge in future microprocessors. New techniques ...
  • Lifetime-sensitive modulo scheduling in a production environment 

    Llosa Espuny, José Francisco; Ayguadé Parra, Eduard; González Colás, Antonio María; Valero Cortés, Mateo; Eckhardt, Jason (2001-03)
    Article
    Restricted access - publisher's policy
    This paper presents a novel software pipelining approach, which is called Swing Modulo Scheduling (SMS). It generates schedules that are near optimal in terms of initiation interval, register requirements, and stage count. ...
  • REEM: failure/non-failure region estimation method for SRAM yield analysis 

    Rana, Manish; Canal Corretger, Ramon (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Conference report
    Restricted access - publisher's policy
    The big challenge that we face today for designing resilient memories is the huge number of simulations needed to arrive at a good estimate of memory's yield. A lot of work has come up recently focusing on the reduction ...
  • Framework for economical error recovery in embedded cores 

    Upasani, Gaurang; Vera, Xavier; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Conference report
    Restricted access - publisher's policy
    The vulnerability of the current and future processors towards transient errors caused by particle strikes is expected to increase rapidly because of exponential growth rate of on-chip transistors, the lower voltages and ...
  • Accurate off-line phase classification for HW/SW co-designed processors 

    Brankovic, Aleksandar; Stavrou, Kyriakos; Gibert Codina, Enric; González Colás, Antonio María (Association for Computing Machinery (ACM), 2014)
    Conference report
    Open Access
    Evaluation techniques in microprocessor design are mostly based on simulating selected application's samples using a cycle-accurate simulator. These samples usually correspond to different phases of the application stream. ...
  • Author retrospective for the dual data cache 

    González Colás, Antonio María; Aliagas Castell, Carles (Association for Computing Machinery (ACM), 2014)
    Part of book or chapter of book
    Open Access
    In this paper we present a retrospective on our paper published in ICS 1995, which to best of our knowledge was the first paper that introduced the concept of a cache memory with multiple subcaches, each tuned for a different ...
  • iRMW: A low-cost technique to reduce NBTI-dependent parametric failures in L1 data caches 

    Ganapathy, Shrikanth; Canal Corretger, Ramon; González Colás, Antonio María; Rubio Sola, Jose Antonio (Institute of Electrical and Electronics Engineers (IEEE), 2014)
    Conference report
    Open Access
    Negative bias temperature instability (NBTI) is a major cause of concern for chip designers because of its inherent ability to drastically reduce silicon reliability over the lifetime of the processor. Coupled with statistical ...
  • Variability impact on on-chip memory data paths 

    Amat Bertran, Esteve; Calomarde Palomino, Antonio; Canal Corretger, Ramon; Rubio Sola, Jose Antonio (2014)
    Conference lecture
    Open Access
    Process variations have a large impact on device and circuit reliability and performance. Few studies are focused on their impact on more complex systems, as for example their influence in a data path. In our study, the ...

View more