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dc.contributor.authorAlmasi, George
dc.contributor.authorAyguadé Parra, Eduard
dc.contributor.authorCascaval, Calin
dc.contributor.authorCastaños, José G.
dc.contributor.authorLabarta Mancho, Jesús José
dc.contributor.authorMartínez, Francisco
dc.contributor.authorMartorell Bofill, Xavier
dc.contributor.authorMoreira, José E.
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2015-06-26T15:27:59Z
dc.date.created2003-06
dc.date.issued2003-06
dc.identifier.citationAlmasi, G. [et al.]. Evaluation of OpenMP for the Cyclops multithreaded architecture. "Lecture notes in computer science", Juny 2003, vol. 2716, p. 69-83.
dc.identifier.issn0302-9743
dc.identifier.urihttp://hdl.handle.net/2117/28443
dc.description.abstractMultithreaded architectures have the potential of tolerating large memory and functional unit latencies and increase resource utilization. The Blue Gene/Cyclops architecture, being developed at the IBM T. J. Watson Research Center, is one such systems that offers massive intra-chip parallelism. Although the BG/C architecture was initially designed to execute specific applications, we believe that it can be effectively used on a broad range of parallel numerical applications. Programming such applications for this unconventional design requires a significant porting effort when using the basic built-in mechanisms for thread management and synchronization. In this paper, we describe the implementation of an OpenMP environment for parallelizing applications, currently under development at the CEPBA-IBM Research Institute, targeting BG/C. The environment is evaluated with a set of simple numerical kernels and a subset of the NAS OpenMP benchmarks. We identify issues that were not initially considered in the design of the BG/C architecture to support a programming model such as OpenMP. We also evaluate features currently offered by the BG/C architecture that should be considered in the implementation of an efficient OpenMP layer for massive intra-chip parallel architectures.
dc.format.extent17 p.
dc.language.isoeng
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles
dc.subject.lcshOpenMP
dc.subject.lcshParallel programming (Computer science)
dc.titleEvaluation of OpenMP for the Cyclops multithreaded architecture
dc.typeArticle
dc.subject.lemacProgramació en paral·lel (Informàtica)
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1007/3-540-45009-2_6
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://link.springer.com/chapter/10.1007%2F3-540-45009-2_6
dc.rights.accessOpen Access
local.identifier.drac681070
dc.description.versionPostprint (author's final draft)
local.citation.authorAlmasi, G.; Ayguadé, E.; Cascaval, C.; Castaños, J.; Labarta, J.; Martínez, F.; Martorell, X.; Moreira, J.
local.citation.publicationNameLecture notes in computer science
local.citation.volume2716
local.citation.startingPage69
local.citation.endingPage83


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